2022-03-08 23:10:08 +01:00
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/*
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* Copyright 2022 The Chromium OS Authors
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/g4/stm32g474Xe.dtsi>
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#include <st/g4/stm32g474r(b-c-e)tx-pinctrl.dtsi>
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2023-08-03 12:52:22 +02:00
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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2022-03-08 23:10:08 +01:00
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/ {
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model = "B-G474E-DPOW1 Discovery board";
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compatible = "st,b-g474e-dpow1";
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chosen {
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zephyr,console = &usart3;
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zephyr,shell-uart = &usart3;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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leds {
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compatible = "gpio-leds";
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blue_led_2: led2 {
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gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>;
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label = "LED_DOWN_BLUE";
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};
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orange_led_3: led3 {
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gpios = <&gpiob 1 GPIO_ACTIVE_HIGH>;
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label = "LED_LEFT_ORANGE";
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};
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green_led_4: led4 {
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gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
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label = "LED_RIGHT_GREEN";
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};
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red_led_5: led5 {
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gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>;
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label = "LED_UP_RED";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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joystick_sel: button0 {
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label = "JOYSTICK_SEL";
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gpios = <&gpioc 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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2023-08-03 12:52:22 +02:00
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zephyr,code = <INPUT_KEY_ENTER>;
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2022-03-08 23:10:08 +01:00
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};
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joystick_left: button1 {
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label = "JOYSTICK_LEFT";
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gpios = <&gpioc 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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2023-08-03 12:52:22 +02:00
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zephyr,code = <INPUT_KEY_LEFT>;
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2022-03-08 23:10:08 +01:00
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};
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joystick_down: button2 {
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label = "JOYSTICK_DOWN";
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gpios = <&gpioc 5 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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2023-08-03 12:52:22 +02:00
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zephyr,code = <INPUT_KEY_DOWN>;
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2022-03-08 23:10:08 +01:00
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};
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joystick_right: button3 {
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label = "JOYSTICK_RIGHT";
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gpios = <&gpiob 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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2023-08-03 12:52:22 +02:00
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zephyr,code = <INPUT_KEY_RIGHT>;
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2022-03-08 23:10:08 +01:00
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};
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joystick_up: button4 {
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label = "JOYSTICK_UP";
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gpios = <&gpiob 10 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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2023-08-03 12:52:22 +02:00
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zephyr,code = <INPUT_KEY_UP>;
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2022-03-08 23:10:08 +01:00
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};
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};
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aliases {
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led0 = &blue_led_2;
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led1 = &orange_led_3;
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led2 = &green_led_4;
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led3 = &red_led_5;
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sw0 = &joystick_sel;
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sw1 = &joystick_left;
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sw2 = &joystick_down;
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sw3 = &joystick_right;
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sw4 = &joystick_up;
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2022-07-19 10:33:14 +02:00
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watchdog0 = &iwdg;
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2022-03-08 23:10:08 +01:00
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};
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};
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2022-12-22 10:16:58 +01:00
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&clk_lsi {
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status = "okay";
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};
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2022-11-24 14:46:38 +01:00
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&clk_hsi48 {
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status = "okay";
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};
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2022-03-08 23:10:08 +01:00
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&clk_hsi {
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status = "okay";
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};
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2023-10-12 17:13:14 +02:00
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stm32_lp_tick_source: &lptim1 {
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2022-12-22 10:16:58 +01:00
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clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
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<&rcc STM32_SRC_LSI LPTIM1_SEL(1)>;
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status = "okay";
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};
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2022-03-08 23:10:08 +01:00
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&pll {
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div-m = <1>;
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mul-n = <16>;
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div-p = <7>;
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div-q = <2>;
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div-r = <2>;
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clocks = <&clk_hsi>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(128)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <1>;
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apb2-prescaler = <1>;
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};
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&usart3 {
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pinctrl-0 = <&usart3_tx_pc10 &usart3_rx_pc11>;
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2022-12-22 10:16:58 +01:00
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pinctrl-1 = <&analog_pc10 &analog_pc11>;
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pinctrl-names = "default", "sleep";
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2022-03-08 23:10:08 +01:00
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current-speed = <115200>;
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status = "okay";
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};
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&iwdg {
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status = "okay";
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};
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2022-05-03 00:43:05 +02:00
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&adc2 {
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pinctrl-0 = <&adc2_in8_pc2>;
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pinctrl-names = "default";
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2023-08-28 10:54:10 +02:00
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st,adc-clock-source = <SYNC>;
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st,adc-prescaler = <4>;
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2022-05-03 00:43:05 +02:00
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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channel@8 {
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reg = <8>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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zephyr,resolution = <12>;
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zephyr,vref-mv = <3300>;
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};
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};
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2022-03-08 23:10:08 +01:00
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&ucpd1 {
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status = "okay";
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/*
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* UCPD is fed directly from HSI which is @ 16MHz. The ucpd_clk goes to
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* a prescaler who's output feeds the 'half-bit' divider which is used
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* to generate clock for delay counters and BMC Rx/Tx blocks. The rx is
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* designed to work in freq ranges of 6 <--> 18 MHz, however recommended
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* range is 9 <--> 18 MHz.
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*
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* +-------+ @ 16 MHz +-------+ @ ~600 kHz +-----------+
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* HSI ---->| /psc |--------->| /hbit |--------------->| trans_cnt |
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* +-------+ +-------+ | +-----------+
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* | +-----------+
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* +----------->| ifrgap_cnt|
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* +-----------+
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* Requirements:
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* 1. hbit_clk ~= 600 kHz: 16 MHz / 600 kHz = 26.67
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* 2. tTransitionWindow - 12 to 20 uSec
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* 3. tInterframGap - uSec
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*
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* hbit_clk = HSI_clk / 27 = 592.6 kHz = 1.687 uSec period
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* tTransitionWindow = 1.687 uS * 8 = 13.5 uS
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* tInterFrameGap = 1.687 uS * 17 = 28.68 uS
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*/
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psc-ucpdclk = <1>;
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hbitclkdiv = <27>;
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2022-05-03 00:43:05 +02:00
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pinctrl-0 = <&ucpd1_cc1_pb6 &ucpd1_cc2_pb4>;
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pinctrl-names = "default";
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2022-03-08 23:10:08 +01:00
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};
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zephyr_udc0: &usb {
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pinctrl-0 = <&usb_dm_pa11 &usb_dp_pa12>;
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pinctrl-names = "default";
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status = "okay";
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};
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