zephyr/boards/cdns/xt-sim/xt-sim_defconfig

# SPDX-License-Identifier: Apache-2.0

CONFIG_MAIN_STACK_SIZE=2048
CONFIG_CONSOLE=y

CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n
CONFIG_SIMULATOR_XTENSA=y

CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=2000000
license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2019-04-06 15:08:09 +02:00			`# SPDX-License-Identifier: Apache-2.0`

Xtensa port: Added board config files for Xtensa simulator paltform This platform is not a real board but let user handle the xtensa simulator just like a board. This is needed until a qemu like simulaotr is added to Xtensa. Change-Id: I54ab28e86eea956cf85af3ee9b4a10f0d531e54d Signed-off-by: Mazen NEIFER <mazen@nestwave.com> 2017-01-13 14:47:57 +01:00			`CONFIG_MAIN_STACK_SIZE=2048`
Xtensa port: Enable console when building for Xtensa simulator as board. Change-Id: I48f25b7c7bb36bd7248e7d9e6718bf365eac56d9 Signed-off-by: Mazen NEIFER <mazen@nestwave.com> 2017-01-31 22:49:02 +01:00			`CONFIG_CONSOLE=y`
arch: xtensa: Convert Xtensa port to use gen_isr_table The Xtensa port was the only one remaining to be converted to the new way of connecting interrupts in Zephyr. Some things are still unconverted, mainly the exception table, and this will be performed another time. Of note: _irq_priority_set() isn't called on _ARCH_IRQ_CONNECT(), since IRQs can't change priority on Xtensa: while the architecture has the concept of interrupt priority levels, each line has a fixed level and can't be changed. Signed-off-by: Leandro Pereira <leandro.pereira@intel.com> 2017-07-07 19:35:18 +02:00
			`CONFIG_GEN_ISR_TABLES=y`
			`CONFIG_GEN_IRQ_VECTOR_TABLE=n`
boards: xt-sim: make board depend on SIMULATOR_XTENSA Signed-off-by: Anas Nashif <anas.nashif@intel.com> 2017-09-11 18:25:39 +02:00			`CONFIG_SIMULATOR_XTENSA=y`
xtensa: remove CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC from arch CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC should be defined at the SoC or the board level since Xtensa cores are high configurable. The default is just for ISS (Instruction Set Simulator). So remove it from the arch level. The xt-sim board is the only one in tree that is targeting the ISS, so add it there. Signed-off-by: Daniel Leung <daniel.leung@intel.com> 2023-12-06 20:34:05 +01:00
			`CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=2000000`