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6c0a5cac06
zephyr
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tests
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arch
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riscv
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fpu_sharing
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testcase.yaml
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tests: riscv: test FPU sharing access behavior The RISC-V FPU context switching code is intricate and sometimes subtle. Here's a test that exercizes various code paths to ensure they work as intended, and to confirm that the target hardware does behave as expected too. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2023-01-28 01:30:57 +01:00
tests
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arch.riscv.fpu_sharing
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samples, tests: convert string-based twister lists to YAML lists Twister now supports using YAML lists for all fields that were written as space-separated lists. Used twister_to_list.py script. Some artifacts on string length are due to how ruamel dumps content. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-08 13:37:42 +02:00
arch_allow
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riscv32
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riscv64
tests: riscv: test FPU sharing access behavior The RISC-V FPU context switching code is intricate and sometimes subtle. Here's a test that exercizes various code paths to ensure they work as intended, and to confirm that the target hardware does behave as expected too. Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2023-01-28 01:30:57 +01:00
filter
:
CONFIG_CPU_HAS_FPU
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