patrick/zephyr
1
0
Fork 0
Code Issues Pull requests Actions 8 Packages Projects Releases Wiki Activity
zephyr/drivers/flash/Kconfig.mcux

141 lines
3.8 KiB
Plaintext
Raw Normal View History

license: cleanup: add SPDX Apache-2.0 license identifier Update the files which contain no license information with the 'Apache-2.0' SPDX license identifier. Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of Zephyr, which is Apache version 2. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-06 15:08:09 +02:00
# SPDX-License-Identifier: Apache-2.0
kconfig: flash: Move mcux code into it's own file Cleanup the Kconfig code for the flash driver. Platform-specific options should be in their own Kconfig files to be consistent and to not pollute the common configuration. To this end we move the mcux options into it's own file. Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2019-02-15 14:42:39 +01:00
config SOC_FLASH_MCUX
bool "MCUX flash shim driver"
drivers: flash: Update drivers to use devicetree Kconfig symbol Update flash drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose the driver and enable it by default based on devicetree. We remove 'depend on' Kconfig for symbols that would be implied by the devicetree node existing. Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-22 08:53:16 +02:00
default y
depends on DT_HAS_NXP_LPC_IAP_ENABLED || \
DT_HAS_NXP_KINETIS_FTFA_ENABLED || \
DT_HAS_NXP_KINETIS_FTFE_ENABLED || \
flash: nxp: updating drivers, Kconfig and device trees with new bindings The lpc and mcux drivers' DRV_COMPAT is updated for the new bindings introduced in the previous commit. The drivers' Kconfig files also reflect this change (DT_HAS_ENABLED_NXP_...). The SoC device trees are updated with the new bindings Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2022-08-12 16:05:25 +02:00
DT_HAS_NXP_KINETIS_FTFL_ENABLED || \
DT_HAS_NXP_IAP_FMC55_ENABLED || \
DT_HAS_NXP_IAP_FMC553_ENABLED
kconfig: flash: Move mcux code into it's own file Cleanup the Kconfig code for the flash driver. Platform-specific options should be in their own Kconfig files to be consistent and to not pollute the common configuration. To this end we move the mcux options into it's own file. Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2019-02-15 14:42:39 +01:00
select FLASH_HAS_PAGE_LAYOUT
select FLASH_HAS_DRIVER_ENABLED
drivers/flash: select to allow flash write by MPU on ARM SoCs Added selection of MPU_ALLOW_FLASH_WRITE. Using a flash driver while MPU is enable without this option on doesn't make sense at all. Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2019-11-04 15:49:21 +01:00
select MPU_ALLOW_FLASH_WRITE if ARM_MPU
kconfig: flash: Move mcux code into it's own file Cleanup the Kconfig code for the flash driver. Platform-specific options should be in their own Kconfig files to be consistent and to not pollute the common configuration. To this end we move the mcux options into it's own file. Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2019-02-15 14:42:39 +01:00
help
Enables the MCUX flash shim driver.
WARNING: This driver will disable the system interrupts for
the duration of the flash erase/write operations. This will
have an impact on the overall system performance - whether
this is acceptable or not will depend on the use case.
drivers: soc_flash_mcux check before reading LPC55xxx SoCs don't allow reading erased areas, the flash memory controller (FMC) will trigger an ECC error for that area. To prevent reading unwritten areas the low level FMC command of margin checking is used, this will fail if the area to be read is not correctly written (margin_check) or area is erased (blank_check). In the case of an erased page, we return dummy data so the application can program that area. Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-05-11 16:40:53 +02:00
if SOC_FLASH_MCUX
config CHECK_BEFORE_READING
bool "Verify area before reading it"
default y if SOC_SERIES_LPC55XXX
help
Do a margin check flash command before reading an area.
This feature prevents erroneous/forbidden reading. Some ECC enabled
devices will crash when reading an erased or wrongly programmed area.
endif # SOC_FLASH_MCUX
drivers: flash: Introduce i.MX RT FlexSPI driver Introduces a new flash driver for the FlexSPI peripheral on i.MX RT SoCs. The hardware provides a flexible sequence engine (LUT) that supports various types of external devices, including serial NOR flash, serial NAND flash, HyperBus (HyperFlash/HyperRAM), and FPGAs. It supports up to four connected devices in single/dual/quad/octal modes and provides memory-mapped read/write access to these devices through the AHB bus. The driver implementation consists of a shared controller for each FlexSPI peripheral instance, and protocol-specific device drivers for each external device. The controller provides a private interface for multiple devices to access the FlexSPI peripheral registers. FlexSPI devices provide the public flash driver interface to applications or subsystems like storage or flash file systems; they also provide protocol-specific LUT sequences to the controller. Currently the only device type supported is QSPI NOR flash, but other types like HyperFlash will be added later. XIP is not yet supported, as this requires additional work to relocate code to RAM and managing interrupts. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-12-18 03:55:28 +01:00
drivers: flash: Update drivers to use devicetree Kconfig symbol Update flash drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose the driver and enable it by default based on devicetree. We remove 'depend on' Kconfig for symbols that would be implied by the devicetree node existing. Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-22 08:53:16 +02:00
if DT_HAS_NXP_IMX_FLEXSPI_ENABLED
drivers: flash: Introduce i.MX RT FlexSPI driver Introduces a new flash driver for the FlexSPI peripheral on i.MX RT SoCs. The hardware provides a flexible sequence engine (LUT) that supports various types of external devices, including serial NOR flash, serial NAND flash, HyperBus (HyperFlash/HyperRAM), and FPGAs. It supports up to four connected devices in single/dual/quad/octal modes and provides memory-mapped read/write access to these devices through the AHB bus. The driver implementation consists of a shared controller for each FlexSPI peripheral instance, and protocol-specific device drivers for each external device. The controller provides a private interface for multiple devices to access the FlexSPI peripheral registers. FlexSPI devices provide the public flash driver interface to applications or subsystems like storage or flash file systems; they also provide protocol-specific LUT sequences to the controller. Currently the only device type supported is QSPI NOR flash, but other types like HyperFlash will be added later. XIP is not yet supported, as this requires additional work to relocate code to RAM and managing interrupts. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-12-18 03:55:28 +01:00
drivers: flash: added flexspi hyperflash. This enables accessing the hyperflash through the flash api. Added a feature to memc_mcux_flexspi that waits for flexspi bus to be quiet. Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
2021-09-20 12:55:57 +02:00
menu "Flexspi flash driver"
drivers: flash: Introduce i.MX RT FlexSPI driver Introduces a new flash driver for the FlexSPI peripheral on i.MX RT SoCs. The hardware provides a flexible sequence engine (LUT) that supports various types of external devices, including serial NOR flash, serial NAND flash, HyperBus (HyperFlash/HyperRAM), and FPGAs. It supports up to four connected devices in single/dual/quad/octal modes and provides memory-mapped read/write access to these devices through the AHB bus. The driver implementation consists of a shared controller for each FlexSPI peripheral instance, and protocol-specific device drivers for each external device. The controller provides a private interface for multiple devices to access the FlexSPI peripheral registers. FlexSPI devices provide the public flash driver interface to applications or subsystems like storage or flash file systems; they also provide protocol-specific LUT sequences to the controller. Currently the only device type supported is QSPI NOR flash, but other types like HyperFlash will be added later. XIP is not yet supported, as this requires additional work to relocate code to RAM and managing interrupts. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-12-18 03:55:28 +01:00
config FLASH_MCUX_FLEXSPI_NOR
bool "MCUX FlexSPI NOR driver"
drivers: flash: Update drivers to use devicetree Kconfig symbol Update flash drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose the driver and enable it by default based on devicetree. We remove 'depend on' Kconfig for symbols that would be implied by the devicetree node existing. Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-22 08:53:16 +02:00
default y
depends on DT_HAS_NXP_IMX_FLEXSPI_NOR_ENABLED
drivers: flash: Introduce i.MX RT FlexSPI driver Introduces a new flash driver for the FlexSPI peripheral on i.MX RT SoCs. The hardware provides a flexible sequence engine (LUT) that supports various types of external devices, including serial NOR flash, serial NAND flash, HyperBus (HyperFlash/HyperRAM), and FPGAs. It supports up to four connected devices in single/dual/quad/octal modes and provides memory-mapped read/write access to these devices through the AHB bus. The driver implementation consists of a shared controller for each FlexSPI peripheral instance, and protocol-specific device drivers for each external device. The controller provides a private interface for multiple devices to access the FlexSPI peripheral registers. FlexSPI devices provide the public flash driver interface to applications or subsystems like storage or flash file systems; they also provide protocol-specific LUT sequences to the controller. Currently the only device type supported is QSPI NOR flash, but other types like HyperFlash will be added later. XIP is not yet supported, as this requires additional work to relocate code to RAM and managing interrupts. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-12-18 03:55:28 +01:00
select FLASH_HAS_PAGE_LAYOUT
select FLASH_HAS_DRIVER_ENABLED
mcux flexspi: move bus driver to drivers/memc Initially the flexspi device only supported a flash driver for external NOR flash. As the controller supports HyperBus devices, which can be either volatile or non-volatile, the driver iss moved to drivers/memc. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-03-31 13:46:34 +02:00
select MEMC
select MEMC_MCUX_FLEXSPI
drivers: flash: Introduce i.MX RT FlexSPI driver Introduces a new flash driver for the FlexSPI peripheral on i.MX RT SoCs. The hardware provides a flexible sequence engine (LUT) that supports various types of external devices, including serial NOR flash, serial NAND flash, HyperBus (HyperFlash/HyperRAM), and FPGAs. It supports up to four connected devices in single/dual/quad/octal modes and provides memory-mapped read/write access to these devices through the AHB bus. The driver implementation consists of a shared controller for each FlexSPI peripheral instance, and protocol-specific device drivers for each external device. The controller provides a private interface for multiple devices to access the FlexSPI peripheral registers. FlexSPI devices provide the public flash driver interface to applications or subsystems like storage or flash file systems; they also provide protocol-specific LUT sequences to the controller. Currently the only device type supported is QSPI NOR flash, but other types like HyperFlash will be added later. XIP is not yet supported, as this requires additional work to relocate code to RAM and managing interrupts. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-12-18 03:55:28 +01:00
drivers: flash: Enable FlexSPI XIP on mimxrt685_evk. Move LUT to driver. Update CMake to include SoC specific driver. Fix mimxrt685_evk LUT header spacing. Signed-off-by: Saurabh Jagdhane <saurabh.jagdhane@nxp.com>
2021-04-22 21:17:23 +02:00
config FLASH_MCUX_FLEXSPI_MX25UM51345G
bool "MCUX FlexSPI MX25UM51345G driver"
drivers: flash: Update drivers to use devicetree Kconfig symbol Update flash drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose the driver and enable it by default based on devicetree. We remove 'depend on' Kconfig for symbols that would be implied by the devicetree node existing. Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-22 08:53:16 +02:00
default y
depends on DT_HAS_NXP_IMX_FLEXSPI_MX25UM51345G_ENABLED
drivers: flash: Enable FlexSPI XIP on mimxrt685_evk. Move LUT to driver. Update CMake to include SoC specific driver. Fix mimxrt685_evk LUT header spacing. Signed-off-by: Saurabh Jagdhane <saurabh.jagdhane@nxp.com>
2021-04-22 21:17:23 +02:00
select FLASH_HAS_PAGE_LAYOUT
select FLASH_HAS_DRIVER_ENABLED
select MEMC
select MEMC_MCUX_FLEXSPI
drivers: flash: added flexspi hyperflash. This enables accessing the hyperflash through the flash api. Added a feature to memc_mcux_flexspi that waits for flexspi bus to be quiet. Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
2021-09-20 12:55:57 +02:00
config FLASH_MCUX_FLEXSPI_HYPERFLASH
bool "MCUX FlexSPI HYPERFLASH driver"
drivers: flash: Update drivers to use devicetree Kconfig symbol Update flash drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose the driver and enable it by default based on devicetree. We remove 'depend on' Kconfig for symbols that would be implied by the devicetree node existing. Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-22 08:53:16 +02:00
default y
depends on DT_HAS_NXP_IMX_FLEXSPI_HYPERFLASH_ENABLED
drivers: flash: added flexspi hyperflash. This enables accessing the hyperflash through the flash api. Added a feature to memc_mcux_flexspi that waits for flexspi bus to be quiet. Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
2021-09-20 12:55:57 +02:00
select FLASH_HAS_PAGE_LAYOUT
select FLASH_HAS_DRIVER_ENABLED
select MEMC
select MEMC_MCUX_FLEXSPI
endmenu
boards: arm: Enable flash for storage on mimxrt595_evk - The MX25UM51345G flash is connected to FLEXSPI PortA for mimxrt595_evk. - Updated flexspi_mx25um51345g driver to support DTR OPI mode. - Tested with tests/drivers/flash. Signed-off-by: Chay Guo <changyi.guo@nxp.com>
2022-05-17 09:53:59 +02:00
if FLASH_MCUX_FLEXSPI_MX25UM51345G
choice FLASH_MCUX_FLEXSPI_MX25UM51345G_OPI_MODE
prompt "FlexSPI MX25UM51345G OPI mode"
default FLASH_MCUX_FLEXSPI_MX25UM51345G_OPI_DTR
help
Select the MX25UM51345G octal flash operation mode(Octal I/O STR
or Octal I/O DTR).
config FLASH_MCUX_FLEXSPI_MX25UM51345G_OPI_STR
bool "STR"
config FLASH_MCUX_FLEXSPI_MX25UM51345G_OPI_DTR
bool "DTR"
endchoice
endif # FLASH_MCUX_FLEXSPI_MX25UM51345G
drivers: flash: mcux flexspi nor: copy data to RAM buffer on write This feature prevents issues when trying to write data to the flash device that is located on or addressed at the same flash device. An example is the mcuboot logic that writes a magic number to the secondary partition header. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-07 20:51:34 +02:00
config FLASH_MCUX_FLEXSPI_NOR_WRITE_BUFFER
bool "MCUX FlexSPI NOR write RAM buffer"
default y
drivers: flash: Enable FlexSPI XIP on mimxrt685_evk. Move LUT to driver. Update CMake to include SoC specific driver. Fix mimxrt685_evk LUT header spacing. Signed-off-by: Saurabh Jagdhane <saurabh.jagdhane@nxp.com>
2021-04-22 21:17:23 +02:00
depends on (FLASH_MCUX_FLEXSPI_NOR || FLASH_MCUX_FLEXSPI_MX25UM51345G)
drivers: flash: mcux flexspi nor: copy data to RAM buffer on write This feature prevents issues when trying to write data to the flash device that is located on or addressed at the same flash device. An example is the mcuboot logic that writes a magic number to the secondary partition header. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-07 20:51:34 +02:00
help
Copy the data to a RAM buffer before writing it to the flash.
This prevents faults when the data to write would be located on the
drivers: flash: added flexspi hyperflash. This enables accessing the hyperflash through the flash api. Added a feature to memc_mcux_flexspi that waits for flexspi bus to be quiet. Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
2021-09-20 12:55:57 +02:00
flash itself.
config FLASH_MCUX_FLEXSPI_HYPERFLASH_WRITE_BUFFER
bool "MCUX FlexSPI HYPERFLASH write RAM buffer"
default y
depends on FLASH_MCUX_FLEXSPI_HYPERFLASH
help
Copy the data to a RAM buffer before writing it to the flash.
This prevents faults when the data to write would be located on the
drivers: flash: mcux flexspi nor: copy data to RAM buffer on write This feature prevents issues when trying to write data to the flash device that is located on or addressed at the same flash device. An example is the mcuboot logic that writes a magic number to the secondary partition header. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-07 20:51:34 +02:00
flash itself.
drivers: flash: Support i.MX FlexSPI NOR driver with XIP This change allows writing to the flash while running in XIP mode, and enables mcuboot or NVS settings to be used on i.MX RT socs. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-15 07:48:57 +02:00
config FLASH_MCUX_FLEXSPI_XIP
bool "MCUX FlexSPI flash access with xip"
boards: imx_rt: Don't default FLASH_MCUX_FLEXSPI_XIP to enabled Do not default FLASH_MCUX_FLEXSPI_XIP to enabled when code is not located in flash, this will cause issues if code is executing from ITCM, as the zephyr_code_relocate macro will relocate the flash driver code into itcm, and overwrite the zephyr image. Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-04-28 23:01:59 +02:00
default y
drivers: flash: Support i.MX FlexSPI NOR driver with XIP This change allows writing to the flash while running in XIP mode, and enables mcuboot or NVS settings to be used on i.MX RT socs. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-15 07:48:57 +02:00
depends on MEMC_MCUX_FLEXSPI
drivers: flash: Enable FlexSPI XIP on mimxrt685_evk. Move LUT to driver. Update CMake to include SoC specific driver. Fix mimxrt685_evk LUT header spacing. Signed-off-by: Saurabh Jagdhane <saurabh.jagdhane@nxp.com>
2021-04-22 21:17:23 +02:00
depends on (CODE_FLEXSPI || CODE_FLEXSPI2 || SOC_SERIES_IMX_RT6XX)
drivers: flash: Support i.MX FlexSPI NOR driver with XIP This change allows writing to the flash while running in XIP mode, and enables mcuboot or NVS settings to be used on i.MX RT socs. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-15 07:48:57 +02:00
select XIP
help
Allows using the flash API while running in XIP.
WARNING: It is possible to overwrite the running application itself.
if FLASH_MCUX_FLEXSPI_XIP
choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
prompt "FlexSPI drivers relocation target"
default FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM
help
Select the location to run the FlexSPI drivers when using
the flash API.
config FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM
bool "ITCM"
drivers: flash: MCUX: Split the relocate define based on target memory Use the CODE_DATA_RELOCATION_SRAM config to indentify code relocated to SRAM so we can setup the MPU for the SRAM region used for code relocation. Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-04-29 00:15:30 +02:00
select CODE_DATA_RELOCATION
drivers: flash: Support i.MX FlexSPI NOR driver with XIP This change allows writing to the flash while running in XIP mode, and enables mcuboot or NVS settings to be used on i.MX RT socs. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-15 07:48:57 +02:00
config FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
bool "SRAM"
drivers: flash: MCUX: Split the relocate define based on target memory Use the CODE_DATA_RELOCATION_SRAM config to indentify code relocated to SRAM so we can setup the MPU for the SRAM region used for code relocation. Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-04-29 00:15:30 +02:00
select CODE_DATA_RELOCATION_SRAM
drivers: flash: Support i.MX FlexSPI NOR driver with XIP This change allows writing to the flash while running in XIP mode, and enables mcuboot or NVS settings to be used on i.MX RT socs. Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-04-15 07:48:57 +02:00
endchoice
config FLASH_MCUX_FLEXSPI_XIP_MEM
string
default "ITCM" if FLASH_MCUX_FLEXSPI_XIP_MEM_ITCM
default "SRAM" if FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
endif # FLASH_MCUX_FLEXSPI_XIP
drivers: flash: Introduce i.MX RT FlexSPI driver Introduces a new flash driver for the FlexSPI peripheral on i.MX RT SoCs. The hardware provides a flexible sequence engine (LUT) that supports various types of external devices, including serial NOR flash, serial NAND flash, HyperBus (HyperFlash/HyperRAM), and FPGAs. It supports up to four connected devices in single/dual/quad/octal modes and provides memory-mapped read/write access to these devices through the AHB bus. The driver implementation consists of a shared controller for each FlexSPI peripheral instance, and protocol-specific device drivers for each external device. The controller provides a private interface for multiple devices to access the FlexSPI peripheral registers. FlexSPI devices provide the public flash driver interface to applications or subsystems like storage or flash file systems; they also provide protocol-specific LUT sequences to the controller. Currently the only device type supported is QSPI NOR flash, but other types like HyperFlash will be added later. XIP is not yet supported, as this requires additional work to relocate code to RAM and managing interrupts. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-12-18 03:55:28 +01:00
endif # HAS_MCUX_FLEXSPI
Reference in a new issue Copy permalink