boards: Split merged board file configuration up

Splits configuration up that was merged as part of hwmv2 due to
the merged configuration feature being reverted

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>

boards/actinius/icarus/actinius_icarus_nrf9160_ns_defconfig

@@ -1,4 +1,23 @@
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 # This board implies building Non-Secure firmware
 CONFIG_TRUSTED_EXECUTION_NONSECURE=y

boards/actinius/icarus_bee/actinius_icarus_bee_nrf9160_ns_defconfig

@@ -1,4 +1,23 @@
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 # This board implies building Non-Secure firmware
 CONFIG_TRUSTED_EXECUTION_NONSECURE=y

boards/actinius/icarus_som/actinius_icarus_som_nrf9160_ns_defconfig

@@ -1,4 +1,23 @@
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 # This board implies building Non-Secure firmware
 CONFIG_TRUSTED_EXECUTION_NONSECURE=y

boards/actinius/icarus_som_dk/actinius_icarus_som_dk_nrf9160_ns_defconfig

@@ -1,4 +1,23 @@
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable TrustZone-M
+CONFIG_ARM_TRUSTZONE_M=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 # This board implies building Non-Secure firmware
 CONFIG_TRUSTED_EXECUTION_NONSECURE=y

boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch32_smp_defconfig

@@ -1,6 +1,28 @@
 # Copyright (c) 2023 Arm Limited (or its affiliates). All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_ARM_MPU=y
+
+CONFIG_ISR_STACK_SIZE=1024
+CONFIG_THREAD_STACK_INFO=y
+
+# Enable Timer and Sys clock
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_ARM_ARCH_TIMER=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable serial port
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+CONFIG_CACHE_MANAGEMENT=y
+CONFIG_DCACHE=n
+
 CONFIG_USE_SWITCH=y
 CONFIG_SMP=y
 CONFIG_MP_MAX_NUM_CPUS=4

boards/arm/fvp_baser_aemv8r/fvp_baser_aemv8r_fvp_aemv8r_aarch64_smp_defconfig

@@ -1,6 +1,25 @@
 # Copyright (c) 2021 Arm Limited (or its affiliates). All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 
+# Cache management
+CONFIG_CACHE_MANAGEMENT=y
+
+CONFIG_THREAD_STACK_INFO=y
+
+# Enable Timer and Sys clock
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_ARM_ARCH_TIMER=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable serial port
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 # Enable simulated CPU power management
 CONFIG_SOC_FVP_AEMV8R_SIMULATE_CPU_PM=y
 CONFIG_PM_CPU_OPS=y

boards/arm/v2m_musca_b1/v2m_musca_b1_musca_b1_ns_defconfig

@@ -4,4 +4,13 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+CONFIG_RUNTIME_NMI=y
+CONFIG_ARM_TRUSTZONE_M=y
+CONFIG_ARM_MPU=y
+
+# Serial
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+
 CONFIG_TRUSTED_EXECUTION_NONSECURE=y

boards/arm/v2m_musca_s1/v2m_musca_s1_musca_s1_ns_defconfig

@@ -4,4 +4,13 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+CONFIG_RUNTIME_NMI=y
+CONFIG_ARM_TRUSTZONE_M=y
+CONFIG_ARM_MPU=y
+
+# Serial
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+
 CONFIG_TRUSTED_EXECUTION_NONSECURE=y

boards/firefly/roc_rk3568_pc/roc_rk3568_pc_rk3568_smp_defconfig

@@ -2,14 +2,32 @@
 # Copyright 2022 openEuler SIG-Zephyr
 # SPDX-License-Identifier: Apache-2.0
 
+# Platform Configuration
+CONFIG_ARM_ARCH_TIMER=y
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_UART_NS16550=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# ARMv8 NS world with cache management
+CONFIG_ARMV8_A_NS=y
+CONFIG_CACHE_MANAGEMENT=y
+CONFIG_DCACHE=y
+
+# Clock support
+CONFIG_CLOCK_CONTROL=y
+CONFIG_TICKLESS_KERNEL=y
+
 # SMP support
 CONFIG_SMP=y
 CONFIG_MP_MAX_NUM_CPUS=4
 CONFIG_MAX_THREAD_BYTES=4
 
-# ARMv8 NS world with cache management
-CONFIG_DCACHE=y
-
 # PSCI support
 CONFIG_PM_CPU_OPS=y
 CONFIG_PM_CPU_OPS_PSCI=y

boards/intel/adsp/intel_adsp_cavs25_tgph_defconfig

@@ -2,7 +2,23 @@
 #
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_DAI_SSP_HAS_POWER_CONTROL=y
+CONFIG_MAIN_STACK_SIZE=2048
+
+CONFIG_GEN_ISR_TABLES=y
+CONFIG_GEN_IRQ_VECTOR_TABLE=n
+
+CONFIG_XTENSA_RESET_VECTOR=y
+
+CONFIG_XTENSA_USE_CORE_CRT1=y
+
+CONFIG_MULTI_LEVEL_INTERRUPTS=y
+CONFIG_2ND_LEVEL_INTERRUPTS=y
+
+CONFIG_BUILD_OUTPUT_BIN=n
 
 CONFIG_MP_MAX_NUM_CPUS=2
 CONFIG_CORE_COUNT=2
+
+CONFIG_DCACHE_LINE_SIZE=64
+
+CONFIG_DAI_SSP_HAS_POWER_CONTROL=y

boards/lairdconnect/bl5340_dvk/bl5340_dvk_nrf5340_defconfig

@@ -1 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0

boards/nordic/nrf5340_audio_dk/nrf5340_audio_dk_nrf5340_defconfig

@@ -1 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0

boards/nordic/nrf54h20dk/nrf54h20dk_defconfig

@@ -1,9 +0,0 @@
-# Copyright (c) 2024 Nordic Semiconductor ASA
-# SPDX-License-Identifier: Apache-2.0
-
-# Enable UART driver
-CONFIG_SERIAL=y
-
-# Enable console
-CONFIG_CONSOLE=y
-CONFIG_UART_CONSOLE=y

boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp_defconfig

@@ -1,6 +1,13 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 CONFIG_USE_DT_CODE_PARTITION=y
 
 # Enable MPU

boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr_defconfig

@@ -1,6 +1,13 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 CONFIG_USE_DT_CODE_PARTITION=y
 
 # Execute from RAM

boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr_xip_defconfig

@@ -1,4 +1,13 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+CONFIG_USE_DT_CODE_PARTITION=y
+
 CONFIG_XIP=y

boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad_defconfig

@@ -1,6 +1,13 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 CONFIG_USE_DT_CODE_PARTITION=y
 
 # Enable MPU

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuapp_defconfig

@@ -1,6 +1,13 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 # Enable MPU
 CONFIG_ARM_MPU=y
 

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_defconfig

@@ -1 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0

boards/nordic/thingy53/thingy53_nrf5340_defconfig

@@ -1 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0

boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0_defconfig

@@ -4,6 +4,11 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+CONFIG_GPIO=y
+CONFIG_PINCTRL=y
+
+CONFIG_RUNTIME_NMI=y
+
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y

boards/nxp/lpcxpresso55s69/lpcxpresso55s69_lpc55s69_cpu0_ns_defconfig

@@ -4,6 +4,11 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+CONFIG_GPIO=y
+CONFIG_PINCTRL=y
+
+CONFIG_RUNTIME_NMI=y
+
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y

boards/nxp/ls1046ardb/ls1046ardb_ls1046a_smp_4cores_defconfig

@@ -1,4 +1,22 @@
 # SPDX-License-Identifier: Apache-2.0
 
+# Platform Configuration
+CONFIG_ARM64_VA_BITS_40=y
+CONFIG_ARM64_PA_BITS_40=y
+# 25 MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
+
+# Zephyr Kernel Configuration
+CONFIG_XIP=n
+CONFIG_AARCH64_IMAGE_HEADER=y
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 # SMP support
 CONFIG_MP_MAX_NUM_CPUS=4

boards/nxp/ls1046ardb/ls1046ardb_ls1046a_smp_defconfig

@@ -1,5 +1,23 @@
 # SPDX-License-Identifier: Apache-2.0
 
+# Platform Configuration
+CONFIG_ARM64_VA_BITS_40=y
+CONFIG_ARM64_PA_BITS_40=y
+# 25 MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
+
+# Zephyr Kernel Configuration
+CONFIG_XIP=n
+CONFIG_AARCH64_IMAGE_HEADER=y
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable Console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
 # Zephyr Kernel Configuration
 CONFIG_MAX_THREAD_BYTES=5
 CONFIG_MAX_XLAT_TABLES=10

boards/qemu/riscv32/qemu_riscv32_qemu_virt_riscv32_smp_defconfig

@@ -1,5 +1,11 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_STACK_SENTINEL=y
+CONFIG_XIP=n
+CONFIG_RISCV_PMP=y
 CONFIG_SMP=y
 CONFIG_MP_MAX_NUM_CPUS=2
 CONFIG_IDLE_STACK_SIZE=1024

boards/qemu/riscv64/qemu_riscv64_qemu_virt_riscv64_smp_defconfig

@@ -1,5 +1,12 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_PRIVILEGED_STACK_SIZE=2048
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_STACK_SENTINEL=y
+CONFIG_XIP=n
+CONFIG_RISCV_PMP=y
 CONFIG_SMP=y
 CONFIG_MP_MAX_NUM_CPUS=2
 CONFIG_IDLE_STACK_SIZE=1024

boards/qemu/x86/qemu_x86_64_atom_nokpti_defconfig

@@ -1,4 +1,17 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2019 Intel Corp.
 
+CONFIG_PIC_DISABLE=y
+CONFIG_LOAPIC=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
+CONFIG_TEST_RANDOM_GENERATOR=y
+CONFIG_DEBUG_INFO=y
+CONFIG_SMP=y
+CONFIG_MP_MAX_NUM_CPUS=2
+CONFIG_X86_MMU=y
+CONFIG_X86_VERY_EARLY_CONSOLE=y
+CONFIG_QEMU_ICOUNT=n
 CONFIG_X86_KPTI=n

boards/qemu/x86/qemu_x86_atom_nokpti_defconfig

@@ -1,4 +1,16 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2019 Intel Corp.
 
+CONFIG_PIC_DISABLE=y
+CONFIG_LOAPIC=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
+CONFIG_TEST_RANDOM_GENERATOR=y
+CONFIG_X86_MMU=y
+CONFIG_DEBUG_INFO=y
+CONFIG_SCHED_SCALABLE=y
+CONFIG_WAITQ_SCALABLE=y
+CONFIG_X86_VERY_EARLY_CONSOLE=y
 CONFIG_X86_KPTI=n

boards/qemu/x86/qemu_x86_atom_nommu_defconfig

@@ -1,7 +1,15 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2019 Intel Corp.
 
+CONFIG_PIC_DISABLE=y
+CONFIG_LOAPIC=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
+CONFIG_TEST_RANDOM_GENERATOR=y
 CONFIG_X86_MMU=n
+CONFIG_DEBUG_INFO=y
 CONFIG_SCHED_DUMB=y
 CONFIG_WAITQ_DUMB=y
 CONFIG_X86_VERY_EARLY_CONSOLE=n

boards/qemu/x86/qemu_x86_atom_nopae_defconfig

@@ -1,4 +1,16 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2019 Intel Corp.
 
+CONFIG_PIC_DISABLE=y
+CONFIG_LOAPIC=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
+CONFIG_TEST_RANDOM_GENERATOR=y
+CONFIG_X86_MMU=y
+CONFIG_DEBUG_INFO=y
+CONFIG_SCHED_SCALABLE=y
+CONFIG_WAITQ_SCALABLE=y
+CONFIG_X86_VERY_EARLY_CONSOLE=y
 CONFIG_X86_PAE=n

boards/qemu/x86/qemu_x86_atom_virt_defconfig

@@ -1,6 +1,18 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2019 Intel Corp.
 
+CONFIG_PIC_DISABLE=y
+CONFIG_LOAPIC=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
+CONFIG_TEST_RANDOM_GENERATOR=y
+CONFIG_X86_MMU=y
+CONFIG_DEBUG_INFO=y
+CONFIG_SCHED_SCALABLE=y
+CONFIG_WAITQ_SCALABLE=y
+CONFIG_X86_VERY_EARLY_CONSOLE=y
 CONFIG_SRAM_OFFSET=0x100000
 CONFIG_KERNEL_VM_SIZE=0x400000
 CONFIG_KERNEL_VM_BASE=0x40000000

boards/qemu/x86/qemu_x86_atom_xip_defconfig

@@ -1,5 +1,16 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2019 Intel Corp.
 
+CONFIG_PIC_DISABLE=y
+CONFIG_LOAPIC=y
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
+CONFIG_TEST_RANDOM_GENERATOR=y
 CONFIG_X86_MMU=n
+CONFIG_DEBUG_INFO=y
+CONFIG_SCHED_SCALABLE=y
+CONFIG_WAITQ_SCALABLE=y
+CONFIG_X86_VERY_EARLY_CONSOLE=y
 CONFIG_XIP=y

boards/raytac/mdbt53_db_40/raytac_mdbt53_db_40_nrf5340_defconfig

@@ -1 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0

boards/raytac/mdbt53v_db_40/raytac_mdbt53v_db_40_nrf5340_defconfig

@@ -1 +0,0 @@
-# SPDX-License-Identifier: Apache-2.0

boards/seeed/xiao_ble/xiao_ble_nrf52840_sense_defconfig

@@ -1,4 +1,29 @@
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable MPU
+CONFIG_ARM_MPU=y
+
+# Enable hardware stack protection
+CONFIG_HW_STACK_PROTECTION=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+
+# Logger cannot use itself to log
+CONFIG_USB_CDC_ACM_LOG_LEVEL_OFF=y
+
+# Enable USB
+CONFIG_USB_DEVICE_STACK=y
+
+# Build UF2 by default, supported by the Adafruit nRF52 Bootloader
+CONFIG_BUILD_OUTPUT_UF2=y
+CONFIG_USE_DT_CODE_PARTITION=y
+
 # Required to enable LSM6DS3TR-C power
 CONFIG_REGULATOR=y

boards/snps/em_starterkit/em_starterkit_emsk_em7d_2_3_defconfig

@@ -1,6 +1,17 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2017 Synopsys
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_GPIO=y
 CONFIG_ARC_HAS_SECURE=y
 CONFIG_TRUSTED_EXECUTION_SECURE=y
 CONFIG_INIT_ARCH_HW_AT_BOOT=y

boards/snps/em_starterkit/em_starterkit_emsk_em7d_defconfig

@@ -1,4 +1,15 @@
 # SPDX-License-Identifier: Apache-2.0
 # Copyright (c) 2017 Synopsys
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_GPIO=y
 CONFIG_ARC_MPU_ENABLE=y

boards/snps/em_starterkit/em_starterkit_emsk_em9d_defconfig

@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: Apache-2.0
+# Copyright (c) 2017 Synopsys
+
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_GPIO=y

boards/snps/emsdp/emsdp_emsdp_em11d_defconfig

@@ -1,4 +1,16 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_ARC_MPU_ENABLE=y
+CONFIG_GPIO=y
 CONFIG_SPI=y
 CONFIG_PINCTRL=y

boards/snps/emsdp/emsdp_emsdp_em5d_defconfig

@@ -1,3 +1,15 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_ARC_MPU_ENABLE=y
+CONFIG_GPIO=y
 CONFIG_SPI=y

boards/snps/emsdp/emsdp_emsdp_em6_defconfig

@@ -1,3 +1,15 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_ARC_MPU_ENABLE=y
+CONFIG_GPIO=y
 CONFIG_SPI=y

boards/snps/emsdp/emsdp_emsdp_em7d_defconfig

@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_ARC_MPU_ENABLE=y
+CONFIG_GPIO=y

boards/snps/emsdp/emsdp_emsdp_em7d_esp_defconfig

@@ -1,5 +1,17 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_ARC_MPU_ENABLE=y
+CONFIG_GPIO=y
 CONFIG_ARC_HAS_SECURE=y
 CONFIG_TRUSTED_EXECUTION_SECURE=y
 CONFIG_SPI=y

boards/snps/emsdp/emsdp_emsdp_em9d_defconfig

@@ -1,3 +1,15 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_ARC_MPU_ENABLE=y
+CONFIG_GPIO=y
 CONFIG_SPI=y

boards/snps/hsdk/hsdk_arc_hsdk_2cores_defconfig

@@ -1,3 +1,15 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_NO_GAP_FILL=y
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+CONFIG_ARC_MPU_ENABLE=y
+CONFIG_GPIO=y
 CONFIG_MP_MAX_NUM_CPUS=2

boards/snps/nsim/nsim_nsim_hs5x_smp_12cores_defconfig

@@ -1,3 +1,11 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_ISA_ARCV3=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
 CONFIG_MP_MAX_NUM_CPUS=12

boards/snps/nsim/nsim_nsim_hs5x_smp_defconfig

@@ -1,5 +1,13 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_ISA_ARCV3=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
 CONFIG_SMP=y
 CONFIG_MP_MAX_NUM_CPUS=2
 CONFIG_TICKET_SPINLOCKS=y

boards/snps/nsim/nsim_nsim_hs6x_smp_12cores_defconfig

@@ -1,3 +1,11 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_ISA_ARCV3=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
 CONFIG_MP_MAX_NUM_CPUS=12

boards/snps/nsim/nsim_nsim_hs6x_smp_defconfig

@@ -1,5 +1,13 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_ISA_ARCV3=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
 CONFIG_SMP=y
 CONFIG_MP_MAX_NUM_CPUS=2
 CONFIG_TICKET_SPINLOCKS=y

boards/snps/nsim/nsim_nsim_hs_flash_xip_defconfig

@@ -1,4 +1,12 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_ARC_MPU_ENABLE=y
 CONFIG_XIP=y
 CONFIG_HARVARD=n

boards/snps/nsim/nsim_nsim_hs_smp_defconfig

@@ -1,5 +1,12 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
 CONFIG_ARC_MPU_ENABLE=n
 CONFIG_SMP=y
 CONFIG_MP_MAX_NUM_CPUS=2

boards/snps/nsim/nsim_nsim_hs_sram_defconfig

@@ -1,3 +1,11 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_ARC_MPU_ENABLE=y
 CONFIG_HARVARD=n

boards/snps/nsim/nsim_nsim_sem_mpu_stack_guard_defconfig

@@ -1,3 +1,12 @@
 # SPDX-License-Identifier: Apache-2.0
 
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_ARC_MPU_ENABLE=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_TRUSTED_EXECUTION_SECURE=y
 CONFIG_ARC_HAS_STACK_CHECKING=n