ITE: drivers/adc: Add config of ADC reference voltage full-scale 3300mV
This option can enable ADC internal reference voltage as full-scale 3300mV. Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
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@ -13,3 +13,13 @@ config ADC_ITE_IT8XXX2
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Voltage range 0 to 3000mV.
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Support 10-bit resolution.
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Support 8 channels: ch0~ch7.
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if ADC_ITE_IT8XXX2
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config ADC_IT8XXX2_VOL_FULL_SCALE
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bool "ADC internal voltage as full-scale"
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help
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This option enables ADC internal reference
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voltage as full-scale 3300mV.
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endif # ADC_ITE_IT8XXX2
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@ -22,7 +22,11 @@ LOG_MODULE_REGISTER(adc_ite_it8xxx2);
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#include "adc_context.h"
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/* ADC internal reference voltage (Unit:mV) */
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#ifdef CONFIG_ADC_IT8XXX2_VOL_FULL_SCALE
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#define IT8XXX2_ADC_VREF_VOL 3300
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#else
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#define IT8XXX2_ADC_VREF_VOL 3000
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#endif
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/* ADC channels disabled */
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#define IT8XXX2_ADC_CHANNEL_DISABLED 0x1F
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/* ADC sample time delay (Unit:us) */
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@ -33,6 +37,12 @@ LOG_MODULE_REGISTER(adc_ite_it8xxx2);
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#define ADC_CHANNEL_SHIFT 5
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#define ADC_CHANNEL_OFFSET(ch) ((ch)-CHIP_ADC_CH13-ADC_CHANNEL_SHIFT)
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#ifdef CONFIG_ADC_IT8XXX2_VOL_FULL_SCALE
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#define ADC_0_7_FULL_SCALE_MASK GENMASK(7, 0)
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#define ADC_8_10_FULL_SCALE_MASK GENMASK(2, 0)
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#define ADC_13_16_FULL_SCALE_MASK GENMASK(3, 0)
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#endif
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/* List of ADC channels. */
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enum chip_adc_channel {
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CHIP_ADC_CH0 = 0,
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@ -407,6 +417,12 @@ static int adc_it8xxx2_init(const struct device *dev)
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struct adc_it8xxx2_regs *const adc_regs = ADC_IT8XXX2_REG_BASE;
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int status;
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#ifdef CONFIG_ADC_IT8XXX2_VOL_FULL_SCALE
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/* ADC input voltage 0V ~ AVCC (3.3V) is mapped into 0h-3FFh */
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adc_regs->ADCIVMFSCS1 = ADC_0_7_FULL_SCALE_MASK;
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adc_regs->ADCIVMFSCS2 = ADC_8_10_FULL_SCALE_MASK;
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adc_regs->ADCIVMFSCS3 = ADC_13_16_FULL_SCALE_MASK;
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#endif
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/* ADC analog accuracy initialization */
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adc_accuracy_initialization();
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@ -22,7 +22,11 @@ LOG_MODULE_REGISTER(vcmp_ite_it8xxx2, CONFIG_SENSOR_LOG_LEVEL);
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#define VCMP_REG_MASK 0x7
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#define VCMP_RESOLUTION BIT(10)
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#ifdef CONFIG_ADC_IT8XXX2_VOL_FULL_SCALE
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#define VCMP_MAX_MVOLT 3300
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#else
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#define VCMP_MAX_MVOLT 3000
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#endif
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/* Device config */
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struct vcmp_it8xxx2_config {
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@ -140,6 +140,9 @@ IT8XXX2_REG_OFFSET_CHECK(kscan_it8xxx2_regs, KBS_KSOLGOEN, 0x0e);
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IT8XXX2_REG_SIZE_CHECK(adc_it8xxx2_regs, 0x6d);
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IT8XXX2_REG_OFFSET_CHECK(adc_it8xxx2_regs, ADCGCR, 0x03);
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IT8XXX2_REG_OFFSET_CHECK(adc_it8xxx2_regs, VCH0DATM, 0x19);
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IT8XXX2_REG_OFFSET_CHECK(adc_it8xxx2_regs, ADCIVMFSCS1, 0x55);
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IT8XXX2_REG_OFFSET_CHECK(adc_it8xxx2_regs, ADCIVMFSCS2, 0x56);
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IT8XXX2_REG_OFFSET_CHECK(adc_it8xxx2_regs, ADCIVMFSCS3, 0x57);
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IT8XXX2_REG_OFFSET_CHECK(adc_it8xxx2_regs, adc_vchs_ctrl[0].VCHCTL, 0x60);
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IT8XXX2_REG_OFFSET_CHECK(adc_it8xxx2_regs, adc_vchs_ctrl[2].VCHDATM, 0x67);
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IT8XXX2_REG_OFFSET_CHECK(adc_it8xxx2_regs, ADCDVSTS2, 0x6c);
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@ -757,8 +757,16 @@ struct adc_it8xxx2_regs {
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volatile uint8_t reserved2[42];
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/* 0x44: ADC Data Valid Status */
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volatile uint8_t ADCDVSTS;
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/* 0x45-0x5f: Reserved3 */
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volatile uint8_t reserved3[27];
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/* 0x45-0x54: Reserved2-1 */
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volatile uint8_t reserved2_1[16];
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/* 0x55: ADC Input Voltage Mapping Full-Scale Code Selection 1 */
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volatile uint8_t ADCIVMFSCS1;
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/* 0x56: ADC Input Voltage Mapping Full-Scale Code Selection 2 */
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volatile uint8_t ADCIVMFSCS2;
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/* 0x57: ADC Input Voltage Mapping Full-Scale Code Selection 3 */
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volatile uint8_t ADCIVMFSCS3;
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/* 0x58-0x5f: Reserved3 */
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volatile uint8_t reserved3[8];
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/* 0x60-0x6b: ADC channel 13~16 controller */
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struct adc_vchs_ctrl_t adc_vchs_ctrl[4];
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/* 0x6c: ADC Data Valid Status 2 */
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