dts: bindings: riscv: Add rv32emc variant

To the 'riscv,isa' property enum. Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2023-02-07 13:20:59 +01:00 · 2023-02-07 13:20:59 +01:00 · 034a274d93
parent dd195d6ea5
commit 034a274d93
1 changed files with 1 additions and 0 deletions
--- a/dts/bindings/riscv/riscv,cpus.yaml
+++ b/dts/bindings/riscv/riscv,cpus.yaml
@ -18,6 +18,7 @@ properties:
    required: true
    type: string
    enum:
+      - rv32emc
      - rv32imac
      - rv32imafc
      - rv32imafcb