boards: x86: Add intel_ prefix to Elkhart Lake boards

This follows the same convention that has already been adopted by Intel
Alder Lake and Raptor Lake boards.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This commit is contained in:
Johan Hedberg 2023-08-14 14:39:34 +03:00 committed by Fabio Baltieri
parent 6cccccb646
commit 03905f7e55
24 changed files with 33 additions and 33 deletions

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@ -1,5 +1,5 @@
# Create an EFI image
if(CONFIG_BOARD_EHL_CRB AND CONFIG_BUILD_OUTPUT_EFI)
if(CONFIG_BOARD_INTEL_EHL_CRB AND CONFIG_BUILD_OUTPUT_EFI)
set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
COMMAND ${PYTHON_EXECUTABLE} ${PROJECT_SOURCE_DIR}/arch/x86/zefi/zefi.py
-c ${CMAKE_C_COMPILER}

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@ -1,13 +1,13 @@
# Copyright (c) 2020 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
config BOARD_EHL_CRB
config BOARD_INTEL_EHL_CRB
bool "Elkhart Lake CRB"
depends on SOC_ELKHART_LAKE
select X86_64
select HAS_COVERAGE_SUPPORT
config BOARD_EHL_CRB_SBL
config BOARD_INTEL_EHL_CRB_SBL
bool "Elkhart Lake CRB (with Slim Bootloader)"
depends on SOC_ELKHART_LAKE
select X86_64

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@ -1,11 +1,11 @@
# Copyright (c) 2020 Intel Corporation
# SPDX-License-Identifier: Apache-2.0
if BOARD_EHL_CRB || BOARD_EHL_CRB_SBL
if BOARD_INTEL_EHL_CRB || BOARD_INTEL_EHL_CRB_SBL
config BOARD
default "ehl_crb_sbl" if BOARD_EHL_CRB_SBL
default "ehl_crb"
default "intel_ehl_crb_sbl" if BOARD_INTEL_EHL_CRB_SBL
default "intel_ehl_crb"
config BUILD_OUTPUT_STRIPPED
default y
@ -13,7 +13,7 @@ config BUILD_OUTPUT_STRIPPED
config MP_MAX_NUM_CPUS
default 2
if BOARD_EHL_CRB_SBL
if BOARD_INTEL_EHL_CRB_SBL
config SHELL_BACKEND_SERIAL_INTERRUPT_DRIVEN
depends on SHELL_BACKEND_SERIAL
default n
@ -34,4 +34,4 @@ config APIC_TIMER_TSC_N
default 249
endif
endif # BOARD_EHL_CRB || BOARD_EHL_CRB_SBL
endif # BOARD_INTEL_EHL_CRB || BOARD_INTEL_EHL_CRB_SBL

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@ -1,4 +1,4 @@
.. _ehl_crb:
.. _intel_ehl_crb:
Elkhart Lake CRB
################
@ -44,7 +44,7 @@ Build Zephyr application
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: ehl_crb
:board: intel_ehl_crb
:goals: build
.. note::

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@ -13,7 +13,7 @@
#include <intel/elkhart_lake.dtsi>
/ {
model = "ehl_crb";
model = "intel_ehl_crb";
compatible = "intel,elkhart_lake_crb";
chosen {

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@ -1,4 +1,4 @@
identifier: ehl_crb
identifier: intel_ehl_crb
name: Elkhart Lake CRB
type: mcu
arch: x86

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@ -1,7 +1,7 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_ELKHART_LAKE=y
CONFIG_BOARD_EHL_CRB=y
CONFIG_BOARD_INTEL_EHL_CRB=y
CONFIG_PIC_DISABLE=y
CONFIG_LOAPIC=y
CONFIG_CONSOLE=y

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@ -21,7 +21,7 @@
};
/ {
model = "ehl_crb";
model = "intel_ehl_crb";
compatible = "intel,elkhart_lake_crb_sbl";
chosen {

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@ -1,4 +1,4 @@
identifier: ehl_crb_sbl
identifier: intel_ehl_crb_sbl
name: Elkhart Lake CRB with Slim Bootloader
type: mcu
arch: x86

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@ -1,7 +1,7 @@
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_ELKHART_LAKE=y
CONFIG_BOARD_EHL_CRB_SBL=y
CONFIG_BOARD_INTEL_EHL_CRB_SBL=y
CONFIG_PIC_DISABLE=y
CONFIG_LOAPIC=y
CONFIG_CONSOLE=y

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@ -4,7 +4,7 @@ sample:
common:
platform_allow:
- qemu_x86_64
- ehl_crb
- intel_ehl_crb
- intel_rpl_s_crb
harness: console
harness_config:

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@ -12,12 +12,12 @@ Building and Running
********************
This project can be built and executed on as following example for the
:ref:`ehl_crb` board:
:ref:`intel_ehl_crb` board:
.. zephyr-app-commands::
:zephyr-app: samples/subsys/edac
:host-os: unix
:board: ehl_crb
:board: intel_ehl_crb
:goals: run
:compact:

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@ -11,7 +11,7 @@ common:
tests:
sample.subsys.edac:
platform_allow: ehl_crb
platform_allow: intel_ehl_crb
integration_platforms:
- ehl_crb
- intel_ehl_crb
tags: edac

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@ -73,7 +73,7 @@ osSemaphoreId forks[NUM_PHIL];
/*
* CMSIS limits the stack size, but qemu_x86_64, qemu_xtensa,
* qemu_leon3 and the boards such as up_squared, ehl_crb,
* qemu_leon3 and the boards such as up_squared, intel_ehl_crb,
* acrn_ehl_crb need 1024 to run this.
* For other arch and boards suggested stack size is 512.
*/

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@ -19,7 +19,7 @@ tests:
platform_allow:
- qemu_x86
- qemu_x86_lakemont
- ehl_crb
- intel_ehl_crb
- acrn_ehl_crb
integration_platforms:
- qemu_x86
@ -30,7 +30,7 @@ tests:
platform_allow:
- qemu_x86
- qemu_x86_lakemont
- ehl_crb
- intel_ehl_crb
- acrn_ehl_crb
integration_platforms:
- qemu_x86
@ -44,7 +44,7 @@ tests:
platform_allow:
- qemu_x86
- qemu_x86_lakemont
- ehl_crb
- intel_ehl_crb
- acrn_ehl_crb
integration_platforms:
- qemu_x86

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@ -11,7 +11,7 @@ tests:
- kernel
- timer
- apic_tsc
platform_allow: ehl_crb
platform_allow: intel_ehl_crb
extra_configs:
- CONFIG_APIC_TSC_DEADLINE_TIMER=y
- CONFIG_HPET_TIMER=n

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@ -10,7 +10,7 @@ tests:
portability.posix.common:
platform_exclude:
- nsim_sem_mpu_stack_guard
- ehl_crb
- intel_ehl_crb
extra_configs:
- CONFIG_NEWLIB_LIBC=n
integration_platforms:
@ -18,7 +18,7 @@ tests:
portability.posix.common.newlib:
platform_exclude:
- nsim_sem_mpu_stack_guard
- ehl_crb
- intel_ehl_crb
- lpcxpresso55s06
filter: TOOLCHAIN_HAS_NEWLIB == 1
extra_configs:
@ -36,7 +36,7 @@ tests:
portability.posix.common.tls:
platform_exclude:
- nsim_sem_mpu_stack_guard
- ehl_crb
- intel_ehl_crb
filter: CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE and CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE
extra_configs:
- CONFIG_NEWLIB_LIBC=n
@ -46,7 +46,7 @@ tests:
portability.posix.common.tls.newlib:
platform_exclude:
- nsim_sem_mpu_stack_guard
- ehl_crb
- intel_ehl_crb
- lpcxpresso55s06
filter: TOOLCHAIN_HAS_NEWLIB == 1 and CONFIG_ARCH_HAS_THREAD_LOCAL_STORAGE and
CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE

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@ -47,7 +47,7 @@ This project can be built as follows:
.. zephyr-app-commands::
:zephyr-app: tests/subsys/edac/ibecc
:board: ehl_crb
:board: intel_ehl_crb
:goals: build
:compact:

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@ -1,6 +1,6 @@
common:
arch_allow: x86
platform_allow: ehl_crb
platform_allow: intel_ehl_crb
tags:
- edac
- ibecc

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@ -1,6 +1,6 @@
common:
arch_allow: x86
platform_allow: ehl_crb
platform_allow: intel_ehl_crb
tags:
- ibecc
- ibecc_cov