drivers: serial: rv32m1_lpuart: Convert driver to new DT_INST macros

Convert driver to use DT_INST macros and remove related board per
instance Kconfig symbol usage.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-04-02 11:01:20 -05:00 committed by Kumar Gala
parent e9aa9201c9
commit 03d48d894d
2 changed files with 48 additions and 162 deletions

View file

@ -7,10 +7,6 @@ config BOARD
default "rv32m1_vega_ri5cy" if SOC_OPENISA_RV32M1_RI5CY
default "rv32m1_vega_zero_riscy" if SOC_OPENISA_RV32M1_ZERO_RISCY
config UART_RV32M1_LPUART_0
default y if UART_CONSOLE
depends on UART_RV32M1_LPUART
if PINMUX_RV32M1
config PINMUX_RV32M1_PORTA

View file

@ -5,6 +5,8 @@
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT openisa_rv32m1_lpuart
#include <errno.h>
#include <device.h>
#include <drivers/uart.h>
@ -294,166 +296,54 @@ static const struct uart_driver_api rv32m1_lpuart_driver_api = {
#endif
};
#ifdef CONFIG_UART_RV32M1_LPUART_0
#define RV32M1_LPUART_DECLARE_CFG(n, IRQ_FUNC_INIT) \
static const struct rv32m1_lpuart_config rv32m1_lpuart_##n##_cfg = {\
.base = (LPUART_Type *)DT_INST_REG_ADDR(n), \
.clock_name = DT_INST_CLOCKS_LABEL(n), \
.clock_subsys = \
(clock_control_subsys_t)DT_INST_CLOCKS_CELL(n, name),\
.clock_ip_name = INST_DT_CLOCK_IP_NAME(n), \
.clock_ip_src = kCLOCK_IpSrcFircAsync, \
.baud_rate = DT_INST_PROP(n, current_speed), \
.hw_flow_control = DT_INST_PROP(n, hw_flow_control), \
IRQ_FUNC_INIT \
}
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_0(struct device *dev);
#define RV32M1_LPUART_CONFIG_FUNC(n) \
static void rv32m1_lpuart_config_func_##n(struct device *dev) \
{ \
IRQ_CONNECT(DT_INST_IRQN(n), 0, rv32m1_lpuart_isr, \
DEVICE_GET(uart_0), 0); \
\
irq_enable(DT_INST_IRQN(n)); \
}
#define RV32M1_LPUART_IRQ_CFG_FUNC_INIT(n) \
.irq_config_func = rv32m1_lpuart_config_func_##n,
#define RV32M1_LPUART_INIT_CFG(n) \
RV32M1_LPUART_DECLARE_CFG(n, RV32M1_LPUART_IRQ_CFG_FUNC_INIT(n))
#else
#define RV32M1_LPUART_CONFIG_FUNC(n)
#define RV32M1_LPUART_IRQ_CFG_FUNC_INIT
#define RV32M1_LPUART_INIT_CFG(n) \
RV32M1_LPUART_DECLARE_CFG(n, RV32M1_LPUART_IRQ_CFG_FUNC_INIT)
#endif
static const struct rv32m1_lpuart_config rv32m1_lpuart_0_config = {
.base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_0_BASE_ADDRESS,
.clock_name = DT_OPENISA_RV32M1_LPUART_UART_0_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_0_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart0,
.clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = DT_OPENISA_RV32M1_LPUART_UART_0_CURRENT_SPEED,
#ifdef DT_OPENISA_RV32M1_LPUART_UART_0_HW_FLOW_CONTROL
.hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_0_HW_FLOW_CONTROL,
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_0,
#endif
};
#define RV32M1_LPUART_INIT(n) \
static struct rv32m1_lpuart_data rv32m1_lpuart_##n##_data; \
\
static const struct rv32m1_lpuart_config rv32m1_lpuart_##n##_cfg;\
\
DEVICE_AND_API_INIT(uart_##n, DT_INST_LABEL(n), \
&rv32m1_lpuart_init, \
&rv32m1_lpuart_##n##_data, \
&rv32m1_lpuart_##n##_cfg, \
PRE_KERNEL_1, \
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
&rv32m1_lpuart_driver_api); \
\
RV32M1_LPUART_CONFIG_FUNC(n) \
\
RV32M1_LPUART_INIT_CFG(n)
static struct rv32m1_lpuart_data rv32m1_lpuart_0_data;
DEVICE_AND_API_INIT(uart_0, DT_OPENISA_RV32M1_LPUART_UART_0_LABEL,
&rv32m1_lpuart_init,
&rv32m1_lpuart_0_data, &rv32m1_lpuart_0_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&rv32m1_lpuart_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_0(struct device *dev)
{
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_0_IRQ_0, 0, rv32m1_lpuart_isr,
DEVICE_GET(uart_0), 0);
irq_enable(DT_OPENISA_RV32M1_LPUART_UART_0_IRQ_0);
}
#endif
#endif /* CONFIG_UART_RV32M1_LPUART_0 */
#ifdef CONFIG_UART_RV32M1_LPUART_1
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_1(struct device *dev);
#endif
static const struct rv32m1_lpuart_config rv32m1_lpuart_1_config = {
.base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_1_BASE_ADDRESS,
.clock_name = DT_OPENISA_RV32M1_LPUART_UART_1_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_1_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart1,
.clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = DT_OPENISA_RV32M1_LPUART_UART_1_CURRENT_SPEED,
#ifdef DT_OPENISA_RV32M1_LPUART_UART_1_HW_FLOW_CONTROL
.hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_1_HW_FLOW_CONTROL,
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_1,
#endif
};
static struct rv32m1_lpuart_data rv32m1_lpuart_1_data;
DEVICE_AND_API_INIT(uart_1, DT_OPENISA_RV32M1_LPUART_UART_1_LABEL,
&rv32m1_lpuart_init,
&rv32m1_lpuart_1_data, &rv32m1_lpuart_1_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&rv32m1_lpuart_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_1(struct device *dev)
{
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_1_IRQ_0, 0, rv32m1_lpuart_isr,
DEVICE_GET(uart_1), 0);
irq_enable(DT_OPENISA_RV32M1_LPUART_UART_1_IRQ_0);
}
#endif
#endif /* CONFIG_UART_RV32M1_LPUART_1 */
#ifdef CONFIG_UART_RV32M1_LPUART_2
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_2(struct device *dev);
#endif
static const struct rv32m1_lpuart_config rv32m1_lpuart_2_config = {
.base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_2_BASE_ADDRESS,
.clock_name = DT_OPENISA_RV32M1_LPUART_UART_2_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_2_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart2,
.clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = DT_OPENISA_RV32M1_LPUART_UART_2_CURRENT_SPEED,
#ifdef DT_OPENISA_RV32M1_LPUART_UART_2_HW_FLOW_CONTROL
.hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_2_HW_FLOW_CONTROL,
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_2,
#endif
};
static struct rv32m1_lpuart_data rv32m1_lpuart_2_data;
DEVICE_AND_API_INIT(uart_2, DT_OPENISA_RV32M1_LPUART_UART_2_LABEL,
&rv32m1_lpuart_init,
&rv32m1_lpuart_2_data, &rv32m1_lpuart_2_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&rv32m1_lpuart_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_2(struct device *dev)
{
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_2_IRQ_0, 0, rv32m1_lpuart_isr,
DEVICE_GET(uart_2), 0);
irq_enable(DT_OPENISA_RV32M1_LPUART_UART_2_IRQ_0);
}
#endif
#endif /* CONFIG_UART_RV32M1_LPUART_2 */
#ifdef CONFIG_UART_RV32M1_LPUART_3
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_3(struct device *dev);
#endif
static const struct rv32m1_lpuart_config rv32m1_lpuart_3_config = {
.base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_3_BASE_ADDRESS,
.clock_name = DT_OPENISA_RV32M1_LPUART_UART_3_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_3_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart3,
.clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = DT_OPENISA_RV32M1_LPUART_UART_3_CURRENT_SPEED,
#ifdef DT_OPENISA_RV32M1_LPUART_UART_3_HW_FLOW_CONTROL
.hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_3_HW_FLOW_CONTROL,
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_3,
#endif
};
static struct rv32m1_lpuart_data rv32m1_lpuart_3_data;
DEVICE_AND_API_INIT(uart_3, DT_OPENISA_RV32M1_LPUART_3_LABEL,
&rv32m1_lpuart_init,
&rv32m1_lpuart_3_data, &rv32m1_lpuart_3_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&rv32m1_lpuart_driver_api);
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_3(struct device *dev)
{
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_UART_3_IRQ_0, 0, rv32m1_lpuart_isr,
DEVICE_GET(uart_3), 0);
irq_enable(DT_OPENISA_RV32M1_LPUART_UART_3_IRQ_0);
}
#endif
#endif /* CONFIG_UART_RV32M1_LPUART_3 */
DT_INST_FOREACH(RV32M1_LPUART_INIT)