driver: espi: it8xxx2: enable CONFIG_ESPI_FLASH_CHANNEL
This enable eSPI flash channel. Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit is contained in:
Dino Li
Christopher Friedt
parent
15a9be674a
commit
03fea69272
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@ -21,6 +21,9 @@ config ESPI_PERIPHERAL_HOST_IO
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config ESPI_PERIPHERAL_DEBUG_PORT_80
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default y
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config ESPI_FLASH_CHANNEL
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default y
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config ESPI_IT8XXX2_PNPCFG_DEVICE_KBC_MOUSE
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bool "ITE IT8XXX2 KBC mouse device"
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help
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@ -60,6 +60,10 @@ LOG_MODULE_REGISTER(espi, CONFIG_ESPI_LOG_LEVEL);
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#define IT8XXX2_ESPI_INPUT_PAD_GATING BIT(6)
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#define IT8XXX2_ESPI_FLASH_MAX_PAYLOAD_SIZE 64
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#define IT8XXX2_ESPI_PUT_FLASH_TAG_MASK GENMASK(7, 4)
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#define IT8XXX2_ESPI_PUT_FLASH_LEN_MASK GENMASK(6, 0)
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struct espi_it8xxx2_config {
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uintptr_t base_espi_slave;
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uintptr_t base_espi_vw;
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@ -75,6 +79,13 @@ struct espi_it8xxx2_data {
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#ifdef CONFIG_ESPI_OOB_CHANNEL
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struct k_sem oob_upstream_go;
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#endif
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#ifdef CONFIG_ESPI_FLASH_CHANNEL
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struct k_sem flash_upstream_go;
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uint8_t put_flash_cycle_type;
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uint8_t put_flash_tag;
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uint8_t put_flash_len;
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uint8_t flash_buf[IT8XXX2_ESPI_FLASH_MAX_PAYLOAD_SIZE];
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#endif
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};
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struct vw_channel_t {
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@ -834,6 +845,236 @@ static void espi_it8xxx2_oob_init(const struct device *dev)
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}
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#endif
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#ifdef CONFIG_ESPI_FLASH_CHANNEL
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#define ESPI_FLASH_TAG 0x01
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#define ESPI_FLASH_READ_TIMEOUT_MS 200
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#define ESPI_FLASH_WRITE_TIMEOUT_MS 500
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#define ESPI_FLASH_ERASE_TIMEOUT_MS 1000
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/* Successful completion without data */
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#define ESPI_IT8XXX2_PUT_FLASH_C_SCWOD 0
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/* Successful completion with data */
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#define ESPI_IT8XXX2_PUT_FLASH_C_SCWD 4
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enum espi_flash_cycle_type {
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IT8XXX2_ESPI_CYCLE_TYPE_FLASH_READ = 0x08,
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IT8XXX2_ESPI_CYCLE_TYPE_FLASH_WRITE = 0x09,
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IT8XXX2_ESPI_CYCLE_TYPE_FLASH_ERASE = 0x0A,
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};
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static int espi_it8xxx2_flash_trans(const struct device *dev,
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struct espi_flash_packet *pckt,
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enum espi_flash_cycle_type tran)
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{
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const struct espi_it8xxx2_config *const config = dev->config;
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struct espi_slave_regs *const slave_reg =
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(struct espi_slave_regs *)config->base_espi_slave;
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struct espi_queue1_regs *const queue1_reg =
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(struct espi_queue1_regs *)config->base_espi_queue1;
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if (!(slave_reg->CH_FLASH_CAPCFG3 & IT8XXX2_ESPI_FC_READY_MASK)) {
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LOG_ERR("%s: Flash channel isn't ready (tran:%d)",
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__func__, tran);
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return -EIO;
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}
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if (slave_reg->ESUCTRL0 & IT8XXX2_ESPI_UPSTREAM_BUSY) {
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LOG_ERR("%s: Upstream busy (tran:%d)", __func__, tran);
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return -EIO;
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}
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if (pckt->len > IT8XXX2_ESPI_FLASH_MAX_PAYLOAD_SIZE) {
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LOG_ERR("%s: Invalid size request (tran:%d)", __func__, tran);
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return -EINVAL;
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}
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/* Set cycle type */
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slave_reg->ESUCTRL1 = tran;
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/* Set tag and length[11:8] */
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slave_reg->ESUCTRL2 = (ESPI_FLASH_TAG << 4);
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/*
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* Set length [7:0]
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* Note: for erasing, the least significant 3 bit of the length field
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* specifies the size of the block to be erased:
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* 001b: 4 Kbytes
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* 010b: 64Kbytes
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* 100b: 128 Kbytes
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* 101b: 256 Kbytes
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*/
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slave_reg->ESUCTRL3 = pckt->len;
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/* Set flash address */
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queue1_reg->UPSTREAM_DATA[0] = (pckt->flash_addr >> 24) & 0xff;
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queue1_reg->UPSTREAM_DATA[1] = (pckt->flash_addr >> 16) & 0xff;
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queue1_reg->UPSTREAM_DATA[2] = (pckt->flash_addr >> 8) & 0xff;
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queue1_reg->UPSTREAM_DATA[3] = pckt->flash_addr & 0xff;
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return 0;
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}
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static int espi_it8xxx2_flash_read(const struct device *dev,
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struct espi_flash_packet *pckt)
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{
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const struct espi_it8xxx2_config *const config = dev->config;
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struct espi_it8xxx2_data *const data = dev->data;
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struct espi_slave_regs *const slave_reg =
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(struct espi_slave_regs *)config->base_espi_slave;
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int ret;
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ret = espi_it8xxx2_flash_trans(dev, pckt,
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IT8XXX2_ESPI_CYCLE_TYPE_FLASH_READ);
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if (ret) {
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return ret;
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}
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/* Set upstream enable */
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_ENABLE;
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/* Set upstream go */
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_GO;
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/* Wait until upstream done or timeout */
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ret = k_sem_take(&data->flash_upstream_go,
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K_MSEC(ESPI_FLASH_READ_TIMEOUT_MS));
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if (ret == -EAGAIN) {
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LOG_ERR("%s: Timeout", __func__);
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return -ETIMEDOUT;
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}
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if (data->put_flash_cycle_type != ESPI_IT8XXX2_PUT_FLASH_C_SCWD) {
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LOG_ERR("%s: Unsuccessful completion", __func__);
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return -EIO;
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}
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memcpy(pckt->buf, data->flash_buf, pckt->len);
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LOG_INF("%s: read (%d) bytes from flash over espi", __func__,
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data->put_flash_len);
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return 0;
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}
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static int espi_it8xxx2_flash_write(const struct device *dev,
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struct espi_flash_packet *pckt)
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{
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const struct espi_it8xxx2_config *const config = dev->config;
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struct espi_it8xxx2_data *const data = dev->data;
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struct espi_slave_regs *const slave_reg =
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(struct espi_slave_regs *)config->base_espi_slave;
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struct espi_queue1_regs *const queue1_reg =
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(struct espi_queue1_regs *)config->base_espi_queue1;
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int ret;
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ret = espi_it8xxx2_flash_trans(dev, pckt,
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IT8XXX2_ESPI_CYCLE_TYPE_FLASH_WRITE);
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if (ret) {
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return ret;
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}
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/* Set data byte */
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for (int i = 0; i < pckt->len; i++) {
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queue1_reg->UPSTREAM_DATA[4 + i] = pckt->buf[i];
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}
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/* Set upstream enable */
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_ENABLE;
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/* Set upstream go */
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_GO;
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/* Wait until upstream done or timeout */
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ret = k_sem_take(&data->flash_upstream_go,
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K_MSEC(ESPI_FLASH_WRITE_TIMEOUT_MS));
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if (ret == -EAGAIN) {
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LOG_ERR("%s: Timeout", __func__);
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return -ETIMEDOUT;
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}
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if (data->put_flash_cycle_type != ESPI_IT8XXX2_PUT_FLASH_C_SCWOD) {
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LOG_ERR("%s: Unsuccessful completion", __func__);
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return -EIO;
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}
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return 0;
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}
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static int espi_it8xxx2_flash_erase(const struct device *dev,
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struct espi_flash_packet *pckt)
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{
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const struct espi_it8xxx2_config *const config = dev->config;
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struct espi_it8xxx2_data *const data = dev->data;
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struct espi_slave_regs *const slave_reg =
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(struct espi_slave_regs *)config->base_espi_slave;
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int ret;
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ret = espi_it8xxx2_flash_trans(dev, pckt,
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IT8XXX2_ESPI_CYCLE_TYPE_FLASH_ERASE);
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if (ret) {
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return ret;
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}
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/* Set upstream enable */
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_ENABLE;
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/* Set upstream go */
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_GO;
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/* Wait until upstream done or timeout */
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ret = k_sem_take(&data->flash_upstream_go,
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K_MSEC(ESPI_FLASH_ERASE_TIMEOUT_MS));
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if (ret == -EAGAIN) {
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LOG_ERR("%s: Timeout", __func__);
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return -ETIMEDOUT;
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}
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if (data->put_flash_cycle_type != ESPI_IT8XXX2_PUT_FLASH_C_SCWOD) {
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LOG_ERR("%s: Unsuccessful completion", __func__);
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return -EIO;
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}
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return 0;
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}
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static void espi_it8xxx2_flash_upstream_done_isr(const struct device *dev)
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{
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const struct espi_it8xxx2_config *const config = dev->config;
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struct espi_it8xxx2_data *const data = dev->data;
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struct espi_slave_regs *const slave_reg =
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(struct espi_slave_regs *)config->base_espi_slave;
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struct espi_queue1_regs *const queue1_reg =
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(struct espi_queue1_regs *)config->base_espi_queue1;
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data->put_flash_cycle_type = slave_reg->ESUCTRL6;
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data->put_flash_tag = slave_reg->ESUCTRL7 &
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IT8XXX2_ESPI_PUT_FLASH_TAG_MASK;
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data->put_flash_len = slave_reg->ESUCTRL8 &
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IT8XXX2_ESPI_PUT_FLASH_LEN_MASK;
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if (slave_reg->ESUCTRL1 == IT8XXX2_ESPI_CYCLE_TYPE_FLASH_READ) {
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if (data->put_flash_len > IT8XXX2_ESPI_FLASH_MAX_PAYLOAD_SIZE) {
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LOG_ERR("%s: Invalid size (%d)", __func__,
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data->put_flash_len);
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} else {
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for (int i = 0; i < data->put_flash_len; i++) {
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data->flash_buf[i] =
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queue1_reg->UPSTREAM_DATA[i];
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}
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}
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}
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k_sem_give(&data->flash_upstream_go);
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}
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static void espi_it8xxx2_flash_init(const struct device *dev)
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{
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const struct espi_it8xxx2_config *const config = dev->config;
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struct espi_it8xxx2_data *const data = dev->data;
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struct espi_slave_regs *const slave_reg =
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(struct espi_slave_regs *)config->base_espi_slave;
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k_sem_init(&data->flash_upstream_go, 0, 1);
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/* Upstream interrupt enable */
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_INTERRUPT_ENABLE;
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}
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#endif /* CONFIG_ESPI_FLASH_CHANNEL */
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/* eSPI driver registration */
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static int espi_it8xxx2_init(const struct device *dev);
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@ -849,6 +1090,11 @@ static const struct espi_driver_api espi_it8xxx2_driver_api = {
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.send_oob = espi_it8xxx2_send_oob,
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.receive_oob = espi_it8xxx2_receive_oob,
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#endif
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#ifdef CONFIG_ESPI_FLASH_CHANNEL
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.flash_read = espi_it8xxx2_flash_read,
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.flash_write = espi_it8xxx2_flash_write,
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.flash_erase = espi_it8xxx2_flash_erase,
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#endif
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};
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static void espi_it8xxx2_vw_notify_system_state(const struct device *dev,
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@ -1193,18 +1439,6 @@ static void espi_it8xxx2_upstream_channel_disable_isr(const struct device *dev)
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_CHANNEL_DISABLE;
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}
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static void espi_it8xxx2_upstream_done_isr(const struct device *dev)
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{
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const struct espi_it8xxx2_config *const config = dev->config;
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struct espi_slave_regs *const slave_reg =
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(struct espi_slave_regs *)config->base_espi_slave;
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/* write-1 to clear this bit */
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_DONE;
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/* upstream disable */
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slave_reg->ESUCTRL0 &= ~IT8XXX2_ESPI_UPSTREAM_ENABLE;
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}
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static void espi_it8xxx2_put_oob_status_isr(const struct device *dev)
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{
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const struct espi_it8xxx2_config *const config = dev->config;
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@ -1219,6 +1453,27 @@ static void espi_it8xxx2_put_oob_status_isr(const struct device *dev)
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}
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#endif
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#if defined(CONFIG_ESPI_OOB_CHANNEL) || defined(CONFIG_ESPI_FLASH_CHANNEL)
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static void espi_it8xxx2_upstream_done_isr(const struct device *dev)
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{
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const struct espi_it8xxx2_config *const config = dev->config;
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struct espi_slave_regs *const slave_reg =
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(struct espi_slave_regs *)config->base_espi_slave;
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#ifdef CONFIG_ESPI_FLASH_CHANNEL
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/* cycle type is flash read, write, or erase */
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if (slave_reg->ESUCTRL1 != IT8XXX2_ESPI_CYCLE_TYPE_OOB) {
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espi_it8xxx2_flash_upstream_done_isr(dev);
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}
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#endif
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/* write-1 to clear this bit */
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slave_reg->ESUCTRL0 |= IT8XXX2_ESPI_UPSTREAM_DONE;
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/* upstream disable */
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slave_reg->ESUCTRL0 &= ~IT8XXX2_ESPI_UPSTREAM_ENABLE;
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}
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#endif
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/*
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* The ISR of espi interrupt event in array need to be matched bit order in
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* IT8XXX2 ESPI ESGCTRL0 register.
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@ -1241,7 +1496,7 @@ static void espi_it8xxx2_isr(const struct device *dev)
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(struct espi_slave_regs *)config->base_espi_slave;
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/* get espi interrupt events */
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uint8_t espi_event = slave_reg->ESGCTRL0;
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#ifdef CONFIG_ESPI_OOB_CHANNEL
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#if defined(CONFIG_ESPI_OOB_CHANNEL) || defined(CONFIG_ESPI_FLASH_CHANNEL)
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uint8_t espi_upstream = slave_reg->ESUCTRL0;
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#endif
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@ -1274,16 +1529,19 @@ static void espi_it8xxx2_isr(const struct device *dev)
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espi_it8xxx2_upstream_channel_disable_isr(dev);
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}
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/* The eSPI upstream transaction is done. */
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if (espi_upstream & IT8XXX2_ESPI_UPSTREAM_DONE) {
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espi_it8xxx2_upstream_done_isr(dev);
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}
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/* The eSPI slave has received a PUT_OOB message. */
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if (slave_reg->ESOCTRL0 & IT8XXX2_ESPI_PUT_OOB_STATUS) {
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espi_it8xxx2_put_oob_status_isr(dev);
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}
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#endif
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/* eSPI oob and flash channels use the same interrupt of upstream. */
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#if defined(CONFIG_ESPI_OOB_CHANNEL) || defined(CONFIG_ESPI_FLASH_CHANNEL)
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/* The eSPI upstream transaction is done. */
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if (espi_upstream & IT8XXX2_ESPI_UPSTREAM_DONE) {
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espi_it8xxx2_upstream_done_isr(dev);
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}
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#endif
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}
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void espi_it8xxx2_enable_pad_ctrl(const struct device *dev, bool enable)
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@ -1398,6 +1656,10 @@ static int espi_it8xxx2_init(const struct device *dev)
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espi_it8xxx2_oob_init(dev);
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#endif
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#ifdef CONFIG_ESPI_FLASH_CHANNEL
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espi_it8xxx2_flash_init(dev);
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#endif
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/* Enable espi interrupt */
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slave_reg->ESGCTRL1 |= IT8XXX2_ESPI_INTERRUPT_ENABLE;
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IRQ_CONNECT(IT8XXX2_ESPI_IRQ, 0, espi_it8xxx2_isr,
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