quark_d2000_crb: make I2C controller work

There are a few bits missing on enabling I2C controller on
quark_d2000_crb. This adds the missing bits.

Change-Id: I05bbe8367a9e69962db573d496f1f9f0167ba597
Signed-off-by: Daniel Leung <daniel.leung@intel.com>

arch/x86/soc/quark_d2000/Kconfig

@@ -185,8 +185,18 @@ config I2C_DW_0_BASE
 config I2C_DW_0_NAME
         default "I2C0"
 
+config I2C_DW_0_IRQ
+        default 4
+
 config I2C_DW_0_INT_PRIORITY
         default 0
+
+config I2C_DW_0_DEFAULT_CFG
+        default 0x12
+
+config I2C_CLOCK_SPEED
+        default 32
+
 endif
 
 endif # SOC_QUARK_D2000

arch/x86/soc/quark_d2000/soc.c

@@ -55,6 +55,11 @@ static int quark_d2000_init(struct device *arg)
 	sys_set_bit(CLOCK_PERIPHERAL_BASE_ADDR, 1);
 #endif /* CONFIG_UART_NS16550 */
 
+#ifdef CONFIG_I2C_DW_0
+	/* Unmask interrupt */
+	sys_clear_bit(I2C_MST_0_INT_MASK, 0);
+#endif
+
 	return 0;
 }
 DECLARE_DEVICE_INIT_CONFIG(quark_d2000_0, "", quark_d2000_init, NULL);

arch/x86/soc/quark_d2000/soc.h

@@ -126,6 +126,8 @@ struct scss_interrupt {
 #define RTC_DW_INT_MASK			(SCSS_INT_BASE + 0x78)
 #define CCU_RTC_CLK_DIV_OFFSET          0x3
 
+/* I2C MST 0 */
+#define I2C_MST_0_INT_MASK		(SCSS_INT_BASE + 0x48)
 
 #ifdef CONFIG_MVIC
 #include <drivers/ioapic.h>

drivers/i2c/i2c_static_irq_stubs.S

@@ -28,13 +28,13 @@
 #endif
 
 #if defined(CONFIG_I2C_DW_0)
-#ifdef CONFIG_IOAPIC
+#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
     ioapic_mkstub i2c_dw_0 i2c_dw_isr i2c_dw_isr_0_device
 #endif
 #endif /* CONFIG_I2C_DW_0 */
 
 #if defined(CONFIG_I2C_DW_1)
-#ifdef CONFIG_IOAPIC
+#if defined(CONFIG_IOAPIC) || defined(CONFIG_MVIC)
     ioapic_mkstub i2c_dw_1 i2c_dw_isr i2c_dw_isr_1_device
 #endif
 #endif /* CONFIG_I2C_DW_1 */