drivers: gpio & interrupt_controller: Add stm32 u5 support
Add changes to STM32 GPIO and Interrupt controller driver to support stm32u5 series. Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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@ -288,7 +288,8 @@ static void gpio_stm32_set_exti_source(int port, int pin)
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#elif CONFIG_SOC_SERIES_STM32MP1X
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LL_EXTI_SetEXTISource(port, line);
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#elif defined(CONFIG_SOC_SERIES_STM32G0X) || \
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defined(CONFIG_SOC_SERIES_STM32L5X)
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defined(CONFIG_SOC_SERIES_STM32L5X) || \
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defined(CONFIG_SOC_SERIES_STM32U5X)
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LL_EXTI_SetEXTISource(port, line);
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#else
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LL_SYSCFG_SetEXTISource(port, line);
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@ -306,7 +307,8 @@ static int gpio_stm32_get_exti_source(int pin)
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#elif CONFIG_SOC_SERIES_STM32MP1X
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port = LL_EXTI_GetEXTISource(line);
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#elif defined(CONFIG_SOC_SERIES_STM32G0X) || \
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defined(CONFIG_SOC_SERIES_STM32L5X)
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defined(CONFIG_SOC_SERIES_STM32L5X) || \
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defined(CONFIG_SOC_SERIES_STM32U5X)
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port = LL_EXTI_GetEXTISource(line);
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#else
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port = LL_SYSCFG_GetEXTISource(line);
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@ -72,7 +72,7 @@ config EXTI_STM32_EXTI4_IRQ_PRI
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help
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IRQ priority of EXTI4 interrupt
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if SOC_SERIES_STM32MP1X || SOC_SERIES_STM32L5X
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if SOC_SERIES_STM32MP1X || SOC_SERIES_STM32L5X || SOC_SERIES_STM32U5X
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config EXTI_STM32_EXTI5_IRQ_PRI
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int "EXTI5 IRQ priority"
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@ -153,7 +153,7 @@ config EXTI_STM32_EXTI15_IRQ_PRI
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endif # SOC_SERIES_STM32MP1X
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if SOC_SERIES_STM32MP1X!=y && SOC_SERIES_STM32L5X!=y
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if SOC_SERIES_STM32MP1X!=y && SOC_SERIES_STM32L5X!=y && SOC_SERIES_STM32U5X!=y
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config EXTI_STM32_EXTI9_5_IRQ_PRI
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int "EXTI9:5 IRQ priority"
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@ -86,7 +86,8 @@ const IRQn_Type exti_irq_table[] = {
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0xFF, TAMP_STAMP_IRQn, RTC_WKUP_IRQn, LPTIM1_IRQn
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};
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#elif defined(CONFIG_SOC_SERIES_STM32MP1X) || \
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defined(CONFIG_SOC_SERIES_STM32L5X)
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defined(CONFIG_SOC_SERIES_STM32L5X) || \
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defined(CONFIG_SOC_SERIES_STM32U5X)
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const IRQn_Type exti_irq_table[] = {
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EXTI0_IRQn, EXTI1_IRQn, EXTI2_IRQn, EXTI3_IRQn,
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EXTI4_IRQn, EXTI5_IRQn, EXTI6_IRQn, EXTI7_IRQn,
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@ -158,7 +159,8 @@ static inline int stm32_exti_is_pending(int line)
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if (line < 32) {
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#if defined(CONFIG_SOC_SERIES_STM32MP1X) || \
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defined(CONFIG_SOC_SERIES_STM32G0X) || \
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defined(CONFIG_SOC_SERIES_STM32L5X)
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defined(CONFIG_SOC_SERIES_STM32L5X) || \
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defined(CONFIG_SOC_SERIES_STM32U5X)
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return (LL_EXTI_IsActiveRisingFlag_0_31(1 << line) ||
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LL_EXTI_IsActiveFallingFlag_0_31(1 << line));
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#elif defined(CONFIG_SOC_SERIES_STM32H7X) && defined(CONFIG_CPU_CORTEX_M4)
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@ -182,7 +184,8 @@ static inline void stm32_exti_clear_pending(int line)
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if (line < 32) {
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#if defined(CONFIG_SOC_SERIES_STM32MP1X) || \
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defined(CONFIG_SOC_SERIES_STM32G0X) || \
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defined(CONFIG_SOC_SERIES_STM32L5X)
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defined(CONFIG_SOC_SERIES_STM32L5X) || \
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defined(CONFIG_SOC_SERIES_STM32U5X)
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LL_EXTI_ClearRisingFlag_0_31(1 << line);
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LL_EXTI_ClearFallingFlag_0_31(1 << line);
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#elif defined(CONFIG_SOC_SERIES_STM32H7X) && defined(CONFIG_CPU_CORTEX_M4)
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@ -303,7 +306,8 @@ static inline void __stm32_exti_isr_4(const void *arg)
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}
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#if defined(CONFIG_SOC_SERIES_STM32MP1X) || \
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defined(CONFIG_SOC_SERIES_STM32L5X)
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defined(CONFIG_SOC_SERIES_STM32L5X) || \
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defined(CONFIG_SOC_SERIES_STM32U5X)
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static inline void __stm32_exti_isr_5(const void *arg)
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{
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__stm32_exti_isr(5, 6, arg);
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@ -481,6 +485,7 @@ static void __stm32_exti_connect_irqs(const struct device *dev)
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defined(CONFIG_SOC_SERIES_STM32L4X) || \
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defined(CONFIG_SOC_SERIES_STM32L5X) || \
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defined(CONFIG_SOC_SERIES_STM32MP1X) || \
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defined(CONFIG_SOC_SERIES_STM32U5X) || \
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defined(CONFIG_SOC_SERIES_STM32WBX) || \
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defined(CONFIG_SOC_SERIES_STM32G4X) || \
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defined(CONFIG_SOC_SERIES_STM32WLX)
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@ -512,7 +517,8 @@ static void __stm32_exti_connect_irqs(const struct device *dev)
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__stm32_exti_isr_4, DEVICE_DT_GET(EXTI_NODE),
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0);
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#if !defined(CONFIG_SOC_SERIES_STM32MP1X) && \
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!defined(CONFIG_SOC_SERIES_STM32L5X)
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!defined(CONFIG_SOC_SERIES_STM32L5X) && \
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!defined(CONFIG_SOC_SERIES_STM32U5X)
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IRQ_CONNECT(EXTI9_5_IRQn,
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CONFIG_EXTI_STM32_EXTI9_5_IRQ_PRI,
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__stm32_exti_isr_9_5, DEVICE_DT_GET(EXTI_NODE),
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