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soc: nxp_imx: Add support for TRNG

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Add support for the TRNG device contained in the i.MX RT SoCs. It uses
the existing MCUX driver, and mostly consists in adding the Kconfig and
DTS entries.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2019-01-10 00:56:25 +01:00 committed by Kumar Gala
parent 2ff5d641f2
commit 074f8a0a26
7 changed files with 40 additions and 0 deletions
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8
dts/arm/nxp/nxp_rt.dtsi
View file

@ -253,6 +253,14 @@
interrupts-names = "IEEE1588_TMR";
};
};
trng: random@400CC000 {
compatible = "nxp,kinetis-trng";
reg = <0x400CC000 0x4000>;
status = "ok";
interrupts = <53 0>;
label = "TRNG";
};
};
};

1
ext/hal/nxp/mcux/drivers/imx/CMakeLists.txt
View file

@ -14,3 +14,4 @@ zephyr_sources_ifdef(CONFIG_GPIO_MCUX_IGPIO fsl_gpio.c)
zephyr_sources_ifdef(CONFIG_SPI_MCUX_LPSPI fsl_lpspi.c)
zephyr_sources_ifdef(CONFIG_UART_MCUX_LPUART fsl_lpuart.c)
zephyr_sources_ifdef(CONFIG_ETH_MCUX fsl_enet.c)
zephyr_sources_ifdef(CONFIG_ENTROPY_MCUX_TRNG fsl_trng.c)

7
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1021
View file

@ -44,4 +44,11 @@ config UART_MCUX_LPUART
endif # SERIAL
if ENTROPY_GENERATOR
config ENTROPY_MCUX_TRNG
default y
endif # ENTROPY_GENERATOR
endif # SOC_MIMXRT1021

6
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052
View file

@ -61,5 +61,11 @@ config INIT_ENET_PLL
endif # NET_L2_ETHERNET
if ENTROPY_GENERATOR
config ENTROPY_MCUX_TRNG
default y
endif # ENTROPY_GENERATOR
endif # SOC_MIMXRT1052

7
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1062
View file

@ -44,4 +44,11 @@ config UART_MCUX_LPUART
endif # SERIAL
if ENTROPY_GENERATOR
config ENTROPY_MCUX_TRNG
default y
endif # ENTROPY_GENERATOR
endif # SOC_MIMXRT1062

5
soc/arm/nxp_imx/rt/Kconfig.soc
View file

@ -16,6 +16,7 @@ config SOC_MIMXRT1021
select HAS_MCUX_IGPIO
select HAS_MCUX_LPSPI
select HAS_MCUX_LPUART
select HAS_MCUX_TRNG
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select INIT_SYS_PLL
@ -29,6 +30,7 @@ config SOC_MIMXRT1051
select HAS_MCUX_IGPIO
select HAS_MCUX_LPSPI
select HAS_MCUX_LPUART
select HAS_MCUX_TRNG
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select INIT_ARM_PLL
@ -42,6 +44,7 @@ config SOC_MIMXRT1052
select HAS_MCUX_IGPIO
select HAS_MCUX_LPSPI
select HAS_MCUX_LPUART
select HAS_MCUX_TRNG
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select INIT_ARM_PLL
@ -54,6 +57,7 @@ config SOC_MIMXRT1061
select HAS_MCUX_CCM
select HAS_MCUX_IGPIO
select HAS_MCUX_LPUART
select HAS_MCUX_TRNG
select CPU_HAS_FPU
select CPU_HAS_MPU
select INIT_ARM_PLL
@ -66,6 +70,7 @@ config SOC_MIMXRT1062
select HAS_MCUX_CCM
select HAS_MCUX_IGPIO
select HAS_MCUX_LPUART
select HAS_MCUX_TRNG
select CPU_HAS_FPU
select CPU_HAS_MPU
select INIT_ARM_PLL

6
soc/arm/nxp_imx/rt/dts_fixup.h
View file

@ -51,4 +51,10 @@
#define DT_IRQ_ETH_IEEE1588_TMR DT_NXP_KINETIS_PTP_402D8000_PTP_IRQ_0
#define DT_ETH_MCUX_0_IRQ_PRI DT_NXP_KINETIS_ETHERNET_402D8000_IRQ_0_PRIORITY
#define DT_ENTROPY_MCUX_TRNG_BASE_ADDRESS DT_NXP_KINETIS_TRNG_400CC000_BASE_ADDRESS
#define DT_ENTROPY_MCUX_TRNG_IRQ DT_NXP_KINETIS_TRNG_400CC000_IRQ_0
#define DT_ENTROPY_MCUX_TRNG_IRQ_PRI DT_NXP_KINETIS_TRNG_400CC000_IRQ_0_PRIORITY
#define DT_ENTROPY_MCUX_TRNG_NAME DT_NXP_KINETIS_TRNG_400CC000_LABEL
#define CONFIG_ENTROPY_NAME DT_NXP_KINETIS_TRNG_400CC000_LABEL
/* End of SoC Level DTS fixup file */