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divers: clock_control: refine multiple uart instance support

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Refine the code to support multile uart instance.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
This commit is contained in:
Jiafei Pan 2022-02-11 16:31:40 +08:00 committed by David Leach
parent 7c441aec12
commit 07c6ad3349
1 changed files with 18 additions and 39 deletions
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57
drivers/clock_control/clock_control_mcux_ccm.c
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@ -24,6 +24,14 @@ static const clock_name_t lpspi_clocks[] = {
kCLOCK_SysPllPfd2Clk,
};
#endif
#ifdef CONFIG_UART_MCUX_IUART
static const clock_root_control_t uart_clk_root[] = {
kCLOCK_RootUart1,
kCLOCK_RootUart2,
kCLOCK_RootUart3,
kCLOCK_RootUart4,
};
#endif
static int mcux_ccm_on(const struct device *dev,
clock_control_subsys_t sub_system)
@ -116,53 +124,24 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
#ifdef CONFIG_UART_MCUX_IUART
case IMX_CCM_UART1_CLK:
mux = CLOCK_GetRootMux(kCLOCK_RootUart1);
if (mux == 0) {
*rate = MHZ(24);
} else if (mux == 1) {
*rate = CLOCK_GetPllFreq(kCLOCK_SystemPll1Ctrl) /
(CLOCK_GetRootPreDivider(kCLOCK_RootUart1)) /
(CLOCK_GetRootPostDivider(kCLOCK_RootUart1)) /
10;
}
break;
case IMX_CCM_UART2_CLK:
mux = CLOCK_GetRootMux(kCLOCK_RootUart2);
if (mux == 0) {
*rate = MHZ(24);
} else if (mux == 1) {
*rate = CLOCK_GetPllFreq(kCLOCK_SystemPll1Ctrl) /
(CLOCK_GetRootPreDivider(kCLOCK_RootUart2)) /
(CLOCK_GetRootPostDivider(kCLOCK_RootUart2)) /
10;
}
break;
case IMX_CCM_UART3_CLK:
mux = CLOCK_GetRootMux(kCLOCK_RootUart3);
case IMX_CCM_UART4_CLK:
{
uint32_t instance = clock_name & IMX_CCM_INSTANCE_MASK;
clock_root_control_t clk_root = uart_clk_root[instance];
uint32_t uart_mux = CLOCK_GetRootMux(clk_root);
if (mux == 0) {
if (uart_mux == 0) {
*rate = MHZ(24);
} else if (mux == 1) {
} else if (uart_mux == 1) {
*rate = CLOCK_GetPllFreq(kCLOCK_SystemPll1Ctrl) /
(CLOCK_GetRootPreDivider(kCLOCK_RootUart3)) /
(CLOCK_GetRootPostDivider(kCLOCK_RootUart3)) /
(CLOCK_GetRootPreDivider(clk_root)) /
(CLOCK_GetRootPostDivider(clk_root)) /
10;
}
break;
case IMX_CCM_UART4_CLK:
mux = CLOCK_GetRootMux(kCLOCK_RootUart4);
if (mux == 0) {
*rate = MHZ(24);
} else if (mux == 1) {
*rate = CLOCK_GetPllFreq(kCLOCK_SystemPll1Ctrl) /
(CLOCK_GetRootPreDivider(kCLOCK_RootUart4)) /
(CLOCK_GetRootPostDivider(kCLOCK_RootUart4)) /
10;
}
break;
} break;
#endif
#ifdef CONFIG_CAN_MCUX_FLEXCAN