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arm: Refactor how UART is configured

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UART is configured statically into the driver directly and not anymore
in the board's system.c. Thus limiting the information to be scattered
into 2 files instead of 3. Then in future, it will also be possible to
remove driver specific informations from the generic UART API structure.

Change-Id: I001f2a6834df9a41ab395a80e4e39b347d545db3
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This commit is contained in:
Tomasz Bursztyka 2015-05-20 14:37:23 +03:00 committed by Anas Nashif
parent 4eb6aab3ad
commit 088e0a980f
6 changed files with 67 additions and 16 deletions
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41
arch/arm/fsl_frdm_k64f/board.h
View file

@ -170,11 +170,49 @@ This header file is used to specify and describe board-level aspects for the
#include <drivers/k20_pcr.h>
#define CONFIG_UART_NUM_SYSTEM_PORTS 1
#define CONFIG_UART_NUM_SYSTEM_PORTS 5
#define CONFIG_UART_NUM_EXTRA_PORTS 0
#define CONFIG_UART_NUM_PORTS \
(CONFIG_UART_NUM_SYSTEM_PORTS + CONFIG_UART_NUM_EXTRA_PORTS)
#define CONFIG_UART_PORT_0_REGS PERIPH_ADDR_BASE_UART0
#define CONFIG_UART_PORT_0_IRQ IRQ_UART0_STATUS
#define CONFIG_UART_PORT_1_REGS PERIPH_ADDR_BASE_UART1
#define CONFIG_UART_PORT_1_IRQ IRQ_UART1_STATUS
#define CONFIG_UART_PORT_2_REGS PERIPH_ADDR_BASE_UART2
#define CONFIG_UART_PORT_2_IRQ IRQ_UART2_STATUS
#define CONFIG_UART_PORT_3_REGS PERIPH_ADDR_BASE_UART3
#define CONFIG_UART_PORT_3_IRQ IRQ_UART3_STATUS
#define CONFIG_UART_PORT_4_REGS PERIPH_ADDR_BASE_UART4
#define CONFIG_UART_PORT_4_IRQ IRQ_UART4_STATUS
#define CONFIGURE_UART_PORTS(__type, __name) \
static __type __name[CONFIG_UART_NUM_PORTS] = { \
{ \
.base = (uint8_t *)CONFIG_UART_PORT_0_REGS, \
.irq = CONFIG_UART_PORT_0_IRQ \
}, \
{ \
.base = (uint8_t *)CONFIG_UART_PORT_1_REGS, \
.irq = CONFIG_UART_PORT_1_IRQ \
}, \
{ \
.base = (uint8_t *)CONFIG_UART_PORT_2_REGS, \
.irq = CONFIG_UART_PORT_2_IRQ \
}, \
{ \
.base = (uint8_t *)CONFIG_UART_PORT_3_REGS, \
.irq = CONFIG_UART_PORT_3_IRQ \
}, \
{ \
.base = (uint8_t *)CONFIG_UART_PORT_4_REGS, \
.irq = CONFIG_UART_PORT_4_IRQ \
} \
}
/* Uart console settings */
#define CONFIG_UART_CONSOLE_INDEX 0
#define CONFIG_UART_CONSOLE_PORT PCR_PORT_B
#define CONFIG_UART_CONSOLE_PORT_RX_PIN 16
@ -182,7 +220,6 @@ This header file is used to specify and describe board-level aspects for the
#define CONFIG_UART_CONSOLE_PORT_MUX_FUNC PCR_MUX_ALT3
#define CONFIG_UART_CONSOLE_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
#define CONFIG_UART_CONSOLE_BAUDRATE 115200
#define CONFIG_UART_CONSOLE_REGS PERIPH_ADDR_BASE_UART0
#define CONFIG_UART_CONSOLE_IRQ IRQ_UART0_STATUS
#define CONFIG_UART_CONSOLE_INT_PRI 3

2
arch/arm/fsl_frdm_k64f/system.c
View file

@ -273,10 +273,8 @@ static void consoleInit(void)
struct uart_init_info info = {
.baud_rate = CONFIG_UART_CONSOLE_BAUDRATE,
.regs = CONFIG_UART_CONSOLE_REGS,
.sys_clk_freq = CONFIG_UART_CONSOLE_CLK_FREQ,
/* Only supported in polling mode, but init all info fields */
.irq = CONFIG_UART_CONSOLE_IRQ,
.int_pri = CONFIG_UART_CONSOLE_INT_PRI
};

25
arch/arm/ti_lm3s6965/board.h
View file

@ -111,12 +111,35 @@ the 'ti_lm3s6965' BSP.
#define CONFIG_UART_NUM_EXTRA_PORTS 1
#define CONFIG_UART_NUM_PORTS \
(CONFIG_UART_NUM_SYSTEM_PORTS + CONFIG_UART_NUM_EXTRA_PORTS)
#define CONFIG_UART_PORT_0_REGS PERIPH_ADDR_BASE_UART0
#define CONFIG_UART_PORT_0_IRQ IRQ_UART0
#define CONFIG_UART_PORT_1_REGS PERIPH_ADDR_BASE_UART1
#define CONFIG_UART_PORT_1_IRQ IRQ_UART1
#define CONFIG_UART_PORT_2_REGS PERIPH_ADDR_BASE_UART2
#define CONFIG_UART_PORT_2_IRQ IRQ_UART2
#define CONFIGURE_UART_PORTS(__type, __name) \
static __type __name[CONFIG_UART_NUM_PORTS] = { \
{ \
.base = (uint8_t *)CONFIG_UART_PORT_0_REGS, \
.irq = CONFIG_UART_PORT_0_IRQ \
}, \
{ \
.base = (uint8_t *)CONFIG_UART_PORT_1_REGS, \
.irq = CONFIG_UART_PORT_1_IRQ \
}, \
{ \
.base = (uint8_t *)CONFIG_UART_PORT_2_REGS, \
.irq = CONFIG_UART_PORT_2_IRQ \
} \
}
/* Uart console configuration */
#define CONFIG_UART_CONSOLE_INDEX 0
#define CONFIG_UART_CONSOLE_BAUDRATE 115200
#define CONFIG_UART_CONSOLE_IRQ IRQ_UART0
#define CONFIG_UART_CONSOLE_INT_PRI 3
#define CONFIG_UART_CONSOLE_REGS PERIPH_ADDR_BASE_UART0
/* Bluetooth UART definitions */
#define CONFIG_BLUETOOTH_UART_INDEX 1

7
arch/arm/ti_lm3s6965/system.c
View file

@ -73,6 +73,8 @@ static inline void uartGenericInfoInit(struct uart_init_info *pInfo)
{
pInfo->sys_clk_freq = SYSCLK_DEFAULT_IOSC_HZ;
pInfo->baud_rate = CONFIG_UART_CONSOLE_BAUDRATE;
/* Only supported in polling mode, but init all info fields */
pInfo->int_pri = CONFIG_UART_CONSOLE_INT_PRI;
}
#endif /* DO_CONSOLE_INIT */
@ -99,11 +101,6 @@ static void consoleInit(void)
RCGC1 |= RCGC1_UART0_EN;
uartGenericInfoInit(&info);
info.regs = CONFIG_UART_CONSOLE_REGS;
/* Only supported in polling mode, but init all info fields */
info.irq = CONFIG_UART_CONSOLE_IRQ;
info.int_pri = CONFIG_UART_CONSOLE_INT_PRI;
uart_init(CONFIG_UART_CONSOLE_INDEX, &info);

4
drivers/serial/k20UartDrv.c
View file

@ -63,7 +63,7 @@ typedef struct {
/* locals */
static _k20Uart_t __noinit uart[CONFIG_UART_NUM_SYSTEM_PORTS];
CONFIGURE_UART_PORTS(_k20Uart_t, uart);
/*******************************************************************************
*
@ -85,8 +85,6 @@ void uart_init(int port, /* UART channel to initialize */
C1_t c1; /* UART C1 register value */
C2_t c2; /* UART C2 register value */
uart[port].base = (uint8_t *)init_info->regs;
uart[port].irq = init_info->irq;
uart[port].intPri = init_info->int_pri;
K20_UART_t *uart_p = (K20_UART_t *)uart[port].base;

4
drivers/serial/stellarisUartDrv.c
View file

@ -151,7 +151,7 @@ struct _StellarisUartPort {
uint8_t intPri; /* interrupt priority level */
};
static struct _StellarisUartPort ports[CONFIG_UART_NUM_PORTS] = { { 0 } };
CONFIGURE_UART_PORTS(struct _StellarisUartPort, ports);
/*******************************************************************************
*
@ -262,8 +262,6 @@ void uart_init(int port, /* UART channel to initialize */
const struct uart_init_info * const init_info
)
{
ports[port].base = (void *)init_info->regs;
ports[port].irq = init_info->irq;
ports[port].intPri = init_info->int_pri;
disable(port);