soc: npcx: workaround VCC1_RST hang issue for npcx9m7fb SoC
Apply the bypass for the issue "Possible Hang-Up After VCC1_RST Reset" in the NPCX99nFB_Errata. Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This commit is contained in:
parent
0bf4ec6d7b
commit
0907aff2ae
|
@ -240,6 +240,14 @@ struct scfg_reg {
|
|||
#define NPCX_LV_GPIO_CTL(base, n) \
|
||||
(*(volatile uint8_t *)(base + NPCX_LV_GPIO_CTL_OFFSET(n)))
|
||||
|
||||
#define NPCX_JEN_CTL1_OFFSET 0x120
|
||||
#define NPCX_JEN_CTL1(base) (*(volatile uint8_t *)(base + (NPCX_JEN_CTL1_OFFSET)))
|
||||
|
||||
#define NPCX_JEN_CTL1_JEN_EN FIELD(0, 4)
|
||||
#define NPCX_JEN_CTL1_JEN_HEN FIELD(4, 4)
|
||||
#define NPCX_JEN_CTL1_JEN_ENABLE 0x9
|
||||
#define NPCX_JEN_CTL1_JEN_DISABLE 0x6
|
||||
|
||||
/* SCFG register fields */
|
||||
#define NPCX_DEVCNT_F_SPI_TRIS 6
|
||||
#define NPCX_DEVCNT_HIF_TYP_SEL_FIELD FIELD(2, 2)
|
||||
|
|
|
@ -5,4 +5,8 @@ zephyr_include_directories(
|
|||
${ZEPHYR_BASE}/drivers
|
||||
)
|
||||
|
||||
zephyr_sources(
|
||||
soc.c
|
||||
)
|
||||
|
||||
set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")
|
||||
|
|
|
@ -48,3 +48,11 @@ config SOC
|
|||
default "npcx9m7f" if SOC_NPCX9M7F
|
||||
default "npcx9m7fb" if SOC_NPCX9M7FB
|
||||
default "npcx9mfp" if SOC_NPCX9MFP
|
||||
|
||||
config NPCX_VCC1_RST_HANG_WORKAROUND
|
||||
bool
|
||||
depends on SOC_NPCX9M7FB
|
||||
default y
|
||||
help
|
||||
Workaround the issue "Possible Hang-Up After VCC1_RST Reset"
|
||||
in the npcx9m7fb SoC errata.
|
||||
|
|
27
soc/nuvoton/npcx/npcx9/soc.c
Normal file
27
soc/nuvoton/npcx/npcx9/soc.c
Normal file
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* Copyright (c) 2024 Nuvoton Technology Corporation.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#include <zephyr/kernel.h>
|
||||
#include <zephyr/device.h>
|
||||
#include <zephyr/init.h>
|
||||
#include <soc.h>
|
||||
#include <zephyr/logging/log.h>
|
||||
|
||||
LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
|
||||
|
||||
static int soc_npcx9_init(void)
|
||||
{
|
||||
if (IS_ENABLED(CONFIG_NPCX_VCC1_RST_HANG_WORKAROUND)) {
|
||||
uintptr_t scfg_base = DT_REG_ADDR_BY_NAME(DT_NODELABEL(scfg), scfg);
|
||||
|
||||
SET_FIELD(NPCX_JEN_CTL1(scfg_base), NPCX_JEN_CTL1_JEN_HEN,
|
||||
NPCX_JEN_CTL1_JEN_DISABLE);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
SYS_INIT(soc_npcx9_init, PRE_KERNEL_1, 0);
|
Loading…
Reference in a new issue