drivers/spi: stm32: Use alt clock freq if available
Add support for an alternate clock. If available, alternate clock is enabled and used to get the device clock rate. Fixes #41650 Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
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@ -489,10 +489,18 @@ static int spi_stm32_configure(const struct device *dev,
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#endif
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}
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if (clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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(clock_control_subsys_t) &cfg->pclken, &clock) < 0) {
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LOG_ERR("Failed call clock_control_get_rate");
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return -EIO;
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if (IS_ENABLED(STM32_SPI_OPT_CLOCK_SUPPORT) && (cfg->pclk_len > 1)) {
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if (clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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(clock_control_subsys_t) &cfg->pclken[1], &clock) < 0) {
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LOG_ERR("Failed call clock_control_get_rate(pclk[1])");
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return -EIO;
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}
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} else {
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if (clock_control_get_rate(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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(clock_control_subsys_t) &cfg->pclken[0], &clock) < 0) {
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LOG_ERR("Failed call clock_control_get_rate(pclk[0])");
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return -EIO;
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}
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}
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for (br = 1 ; br <= ARRAY_SIZE(scaler) ; ++br) {
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@ -860,10 +868,21 @@ static int spi_stm32_init(const struct device *dev)
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const struct spi_stm32_config *cfg = dev->config;
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int err;
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if (clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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(clock_control_subsys_t) &cfg->pclken) != 0) {
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err = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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(clock_control_subsys_t) &cfg->pclken[0]);
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if (err < 0) {
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LOG_ERR("Could not enable SPI clock");
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return -EIO;
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return err;
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}
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if (IS_ENABLED(STM32_SPI_OPT_CLOCK_SUPPORT) && (cfg->pclk_len > 1)) {
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err = clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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(clock_control_subsys_t) &cfg->pclken[1],
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NULL);
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if (err < 0) {
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LOG_ERR("Could not select SPI source clock");
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return err;
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}
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}
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if (!spi_stm32_is_subghzspi(dev)) {
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@ -971,17 +990,20 @@ static void spi_stm32_irq_config_func_##id(const struct device *dev) \
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#define STM32_SPI_USE_SUBGHZSPI_NSS_CONFIG(id)
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#endif
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#define STM32_SPI_INIT(id) \
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STM32_SPI_IRQ_HANDLER_DECL(id); \
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\
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PINCTRL_DT_INST_DEFINE(id); \
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\
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static const struct stm32_pclken pclken_##id[] = \
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STM32_DT_INST_CLOCKS(id);\
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\
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static const struct spi_stm32_config spi_stm32_cfg_##id = { \
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.spi = (SPI_TypeDef *) DT_INST_REG_ADDR(id), \
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.pclken = { \
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.enr = DT_INST_CLOCKS_CELL(id, bits), \
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.bus = DT_INST_CLOCKS_CELL(id, bus) \
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}, \
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.pclken = pclken_##id, \
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.pclk_len = DT_INST_NUM_CLOCKS(id), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(id), \
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STM32_SPI_IRQ_HANDLER_FUNC(id) \
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STM32_SPI_USE_SUBGHZSPI_NSS_CONFIG(id) \
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@ -11,8 +11,15 @@
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typedef void (*irq_config_func_t)(const struct device *port);
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/* This symbol takes the value 1 if one of the device instances */
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/* is configured in dts with an optional clock */
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#if STM32_DT_INST_DEV_OPT_CLOCK_SUPPORT
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#define STM32_SPI_OPT_CLOCK_SUPPORT 1
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#else
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#define STM32_SPI_OPT_CLOCK_SUPPORT 0
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#endif
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struct spi_stm32_config {
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struct stm32_pclken pclken;
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SPI_TypeDef *spi;
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const struct pinctrl_dev_config *pcfg;
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#ifdef CONFIG_SPI_STM32_INTERRUPT
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@ -21,6 +28,8 @@ struct spi_stm32_config {
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32_spi_subghz)
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bool use_subghzspi_nss;
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#endif
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size_t pclk_len;
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const struct stm32_pclken *pclken;
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};
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#ifdef CONFIG_SPI_STM32_DMA
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