xen: dom0: update Xen public headers for running Zephyr as Dom0
Xen public headers are added to Zephyr kernel partially, so we need to update them for new features implementation. Further implementation of Xen domains configuration and memory management requires dedicated Xen public headers inside Zephyr kernel. It will be used for add Zephyr OS Xen Domain-0 funtionalities. Update existent and add new required public headers from Xen 4.17.0 release. Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
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@ -205,15 +205,138 @@ typedef uint64_t xen_pfn_t;
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#define PRI_xen_pfn PRIx64
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#define PRIu_xen_pfn PRIu64
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typedef uint64_t xen_ulong_t;
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#define PRI_xen_ulong PRIx64
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/*
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* Maximum number of virtual CPUs in legacy multi-processor guests.
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* Only one. All other VCPUS must use VCPUOP_register_vcpu_info.
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*/
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#define XEN_LEGACY_MAX_VCPUS 1
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typedef uint64_t xen_ulong_t;
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#define PRI_xen_ulong PRIx64
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#ifdef CONFIG_XEN_DOM0
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#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
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/* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
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# define __DECL_REG(n64, n32) union { \
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uint64_t n64; \
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uint32_t n32; \
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}
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#else
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/* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */
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#define __DECL_REG(n64, n32) uint64_t n64
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#endif
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struct vcpu_guest_core_regs {
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/* Aarch64 Aarch32 */
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__DECL_REG(x0, r0_usr);
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__DECL_REG(x1, r1_usr);
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__DECL_REG(x2, r2_usr);
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__DECL_REG(x3, r3_usr);
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__DECL_REG(x4, r4_usr);
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__DECL_REG(x5, r5_usr);
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__DECL_REG(x6, r6_usr);
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__DECL_REG(x7, r7_usr);
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__DECL_REG(x8, r8_usr);
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__DECL_REG(x9, r9_usr);
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__DECL_REG(x10, r10_usr);
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__DECL_REG(x11, r11_usr);
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__DECL_REG(x12, r12_usr);
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__DECL_REG(x13, sp_usr);
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__DECL_REG(x14, lr_usr);
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__DECL_REG(x15, __unused_sp_hyp);
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__DECL_REG(x16, lr_irq);
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__DECL_REG(x17, sp_irq);
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__DECL_REG(x18, lr_svc);
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__DECL_REG(x19, sp_svc);
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__DECL_REG(x20, lr_abt);
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__DECL_REG(x21, sp_abt);
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__DECL_REG(x22, lr_und);
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__DECL_REG(x23, sp_und);
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__DECL_REG(x24, r8_fiq);
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__DECL_REG(x25, r9_fiq);
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__DECL_REG(x26, r10_fiq);
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__DECL_REG(x27, r11_fiq);
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__DECL_REG(x28, r12_fiq);
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__DECL_REG(x29, sp_fiq);
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__DECL_REG(x30, lr_fiq);
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/* Return address and mode */
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__DECL_REG(pc64, pc32); /* ELR_EL2 */
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uint32_t cpsr; /* SPSR_EL2 */
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union {
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uint32_t spsr_el1; /* AArch64 */
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uint32_t spsr_svc; /* AArch32 */
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};
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/* AArch32 guests only */
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uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt;
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/* AArch64 guests only */
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uint64_t sp_el0;
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uint64_t sp_el1, elr_el1;
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};
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typedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t;
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DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t);
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#undef __DECL_REG
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struct vcpu_guest_context {
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#define _VGCF_online 0
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#define VGCF_online (1 << _VGCF_online)
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uint32_t flags; /* VGCF_* */
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struct vcpu_guest_core_regs user_regs; /* Core CPU registers */
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uint64_t sctlr;
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uint64_t ttbcr, ttbr0, ttbr1;
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};
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typedef struct vcpu_guest_context vcpu_guest_context_t;
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DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t);
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/*
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* struct xen_arch_domainconfig's ABI is covered by
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* XEN_DOMCTL_INTERFACE_VERSION.
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*/
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#define XEN_DOMCTL_CONFIG_GIC_NATIVE 0
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#define XEN_DOMCTL_CONFIG_GIC_V2 1
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#define XEN_DOMCTL_CONFIG_GIC_V3 2
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#define XEN_DOMCTL_CONFIG_TEE_NONE 0
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#define XEN_DOMCTL_CONFIG_TEE_OPTEE 1
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struct xen_arch_domainconfig {
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/* IN/OUT */
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uint8_t gic_version;
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/* IN */
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uint16_t tee_type;
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/* IN */
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uint32_t nr_spis;
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/*
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* OUT
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* Based on the property clock-frequency in the DT timer node.
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* The property may be present when the bootloader/firmware doesn't
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* set correctly CNTFRQ which hold the timer frequency.
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*
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* As it's not possible to trap this register, we have to replicate
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* the value in the guest DT.
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*
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* = 0 => property not present
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* > 0 => Value of the property
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*
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*/
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uint32_t clock_frequency;
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};
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#endif /* CONFIG_XEN_DOM0 */
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struct arch_vcpu_info {
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};
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typedef struct arch_vcpu_info arch_vcpu_info_t;
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@ -225,4 +348,129 @@ typedef uint64_t xen_callback_t;
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#endif /* __ASSEMBLY__ */
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#ifdef CONFIG_XEN_DOM0
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/* PSR bits (CPSR, SPSR) */
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#define PSR_THUMB (1 << 5) /* Thumb Mode enable */
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#define PSR_FIQ_MASK (1 << 6) /* Fast Interrupt mask */
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#define PSR_IRQ_MASK (1 << 7) /* Interrupt mask */
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#define PSR_ABT_MASK (1 << 8) /* Asynchronous Abort mask */
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#define PSR_BIG_ENDIAN (1 << 9) /* arm32: Big Endian Mode */
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#define PSR_DBG_MASK (1 << 9) /* arm64: Debug Exception mask */
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#define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */
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#define PSR_JAZELLE (1<<24) /* Jazelle Mode */
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/* 32 bit modes */
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#define PSR_MODE_USR 0x10
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#define PSR_MODE_FIQ 0x11
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#define PSR_MODE_IRQ 0x12
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#define PSR_MODE_SVC 0x13
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#define PSR_MODE_MON 0x16
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#define PSR_MODE_ABT 0x17
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#define PSR_MODE_HYP 0x1a
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#define PSR_MODE_UND 0x1b
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#define PSR_MODE_SYS 0x1f
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/* 64 bit modes */
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#define PSR_MODE_BIT 0x10 /* Set iff AArch32 */
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#define PSR_MODE_EL3h 0x0d
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#define PSR_MODE_EL3t 0x0c
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#define PSR_MODE_EL2h 0x09
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#define PSR_MODE_EL2t 0x08
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#define PSR_MODE_EL1h 0x05
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#define PSR_MODE_EL1t 0x04
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#define PSR_MODE_EL0t 0x00
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#define PSR_GUEST32_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC)
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#define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h)
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#define SCTLR_GUEST_INIT xen_mk_ullong(0x00c50078)
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/*
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* Virtual machine platform (memory layout, interrupts)
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*
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* These are defined for consistency between the tools and the
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* hypervisor. Guests must not rely on these hardcoded values but
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* should instead use the FDT.
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*/
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/* Physical Address Space */
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/*
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* vGIC mappings: Only one set of mapping is used by the guest.
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* Therefore they can overlap.
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*/
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/* vGIC v2 mappings */
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#define GUEST_GICD_BASE xen_mk_ullong(0x03001000)
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#define GUEST_GICD_SIZE xen_mk_ullong(0x00001000)
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#define GUEST_GICC_BASE xen_mk_ullong(0x03002000)
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#define GUEST_GICC_SIZE xen_mk_ullong(0x00002000)
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/* vGIC v3 mappings */
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#define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000)
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#define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000)
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#define GUEST_GICV3_RDIST_REGIONS 1
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#define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */
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#define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000)
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/* ACPI tables physical address */
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#define GUEST_ACPI_BASE xen_mk_ullong(0x20000000)
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#define GUEST_ACPI_SIZE xen_mk_ullong(0x02000000)
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/* PL011 mappings */
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#define GUEST_PL011_BASE xen_mk_ullong(0x22000000)
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#define GUEST_PL011_SIZE xen_mk_ullong(0x00001000)
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/*
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* 16MB == 4096 pages reserved for guest to use as a region to map its
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* grant table in.
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*/
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#define GUEST_GNTTAB_BASE xen_mk_ullong(0x38000000)
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#define GUEST_GNTTAB_SIZE xen_mk_ullong(0x01000000)
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#define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000)
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#define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000)
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#define GUEST_RAM_BANKS 2
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#define GUEST_RAM0_BASE xen_mk_ullong(0x40000000) /* 3GB of low RAM @ 1GB */
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#define GUEST_RAM0_SIZE xen_mk_ullong(0xc0000000)
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#define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016GB of RAM @ 8GB */
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#define GUEST_RAM1_SIZE xen_mk_ullong(0xfe00000000)
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#define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */
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/* Largest amount of actual RAM, not including holes */
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#define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE)
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/* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */
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#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE }
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#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE }
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/* Current supported guest VCPUs */
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#define GUEST_MAX_VCPUS 128
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/* Interrupts */
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#define GUEST_TIMER_VIRT_PPI 27
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#define GUEST_TIMER_PHYS_S_PPI 29
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#define GUEST_TIMER_PHYS_NS_PPI 30
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#define GUEST_EVTCHN_PPI 31
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#define GUEST_VPL011_SPI 32
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/* PSCI functions */
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#define PSCI_cpu_suspend 0
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#define PSCI_cpu_off 1
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#define PSCI_cpu_on 2
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#define PSCI_migrate 3
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#endif /* CONFIG_XEN_DOM0 */
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#ifndef __ASSEMBLY__
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/* Stub definition of PMU structure */
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typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t;
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#endif /* __ASSEMBLY__ */
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#endif /* __XEN_PUBLIC_ARCH_ARM_H__ */
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517
include/zephyr/xen/public/domctl.h
Normal file
517
include/zephyr/xen/public/domctl.h
Normal file
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@ -0,0 +1,517 @@
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/* SPDX-License-Identifier: MIT */
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/******************************************************************************
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* domctl.h
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*
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* Domain management operations. For use by node control stack.
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*
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* Copyright (c) 2002-2003, B Dragovic
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* Copyright (c) 2002-2006, K Fraser
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*/
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#ifndef __XEN_PUBLIC_DOMCTL_H__
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#define __XEN_PUBLIC_DOMCTL_H__
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#ifndef CONFIG_XEN_DOM0
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#error "domctl operations are intended for use by node control tools only"
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#endif
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#include "xen.h"
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#include "event_channel.h"
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#include "grant_table.h"
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#include "memory.h"
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#define XEN_DOMCTL_INTERFACE_VERSION 0x00000015
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/*
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* NB. xen_domctl.domain is an IN/OUT parameter for this operation.
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* If it is specified as an invalid value (0 or >= DOMID_FIRST_RESERVED),
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* an id is auto-allocated and returned.
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*/
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/* XEN_DOMCTL_createdomain */
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struct xen_domctl_createdomain {
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/* IN parameters */
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uint32_t ssidref;
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xen_domain_handle_t handle;
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/* Is this an HVM guest (as opposed to a PV guest)? */
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#define _XEN_DOMCTL_CDF_hvm 0
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#define XEN_DOMCTL_CDF_hvm (1U << _XEN_DOMCTL_CDF_hvm)
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/* Use hardware-assisted paging if available? */
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#define _XEN_DOMCTL_CDF_hap 1
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#define XEN_DOMCTL_CDF_hap (1U << _XEN_DOMCTL_CDF_hap)
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/* Should domain memory integrity be verifed by tboot during Sx? */
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#define _XEN_DOMCTL_CDF_s3_integrity 2
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#define XEN_DOMCTL_CDF_s3_integrity (1U << _XEN_DOMCTL_CDF_s3_integrity)
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/* Disable out-of-sync shadow page tables? */
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#define _XEN_DOMCTL_CDF_oos_off 3
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#define XEN_DOMCTL_CDF_oos_off (1U << _XEN_DOMCTL_CDF_oos_off)
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/* Is this a xenstore domain? */
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#define _XEN_DOMCTL_CDF_xs_domain 4
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#define XEN_DOMCTL_CDF_xs_domain (1U << _XEN_DOMCTL_CDF_xs_domain)
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/* Should this domain be permitted to use the IOMMU? */
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#define _XEN_DOMCTL_CDF_iommu 5
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#define XEN_DOMCTL_CDF_iommu (1U << _XEN_DOMCTL_CDF_iommu)
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#define _XEN_DOMCTL_CDF_nested_virt 6
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#define XEN_DOMCTL_CDF_nested_virt (1U << _XEN_DOMCTL_CDF_nested_virt)
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/* Should we expose the vPMU to the guest? */
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#define XEN_DOMCTL_CDF_vpmu (1U << 7)
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/* Max XEN_DOMCTL_CDF_* constant. Used for ABI checking. */
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#define XEN_DOMCTL_CDF_MAX XEN_DOMCTL_CDF_vpmu
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uint32_t flags;
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#define _XEN_DOMCTL_IOMMU_no_sharept 0
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#define XEN_DOMCTL_IOMMU_no_sharep (1U << _XEN_DOMCTL_IOMMU_no_sharept)
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/* Max XEN_DOMCTL_IOMMU_* constant. Used for ABI checking. */
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#define XEN_DOMCTL_IOMMU_MAX XEN_DOMCTL_IOMMU_no_sharept
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uint32_t iommu_opts;
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/*
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* Various domain limits, which impact the quantity of resources
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* (global mapping space, xenheap, etc) a guest may consume. For
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* max_grant_frames and max_maptrack_frames, < 0 means "use the
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* default maximum value in the hypervisor".
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*/
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uint32_t max_vcpus;
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uint32_t max_evtchn_port;
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int32_t max_grant_frames;
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int32_t max_maptrack_frames;
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/* Grant version, use low 4 bits. */
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#define XEN_DOMCTL_GRANT_version_mask 0xf
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#define XEN_DOMCTL_GRANT_version(v) ((v) & XEN_DOMCTL_GRANT_version_mask)
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uint32_t grant_opts;
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/* Per-vCPU buffer size in bytes. 0 to disable. */
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uint32_t vmtrace_size;
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/* CPU pool to use; specify 0 or a specific existing pool */
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uint32_t cpupool_id;
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struct xen_arch_domainconfig arch;
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};
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/* XEN_DOMCTL_getdomaininfo */
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struct xen_domctl_getdomaininfo {
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/* OUT variables. */
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domid_t domain; /* Also echoed in domctl.domain */
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uint16_t pad1;
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/* Domain is scheduled to die. */
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#define _XEN_DOMINF_dying 0
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#define XEN_DOMINF_dying (1U << _XEN_DOMINF_dying)
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/* Domain is an HVM guest (as opposed to a PV guest). */
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#define _XEN_DOMINF_hvm_guest 1
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#define XEN_DOMINF_hvm_guest (1U << _XEN_DOMINF_hvm_guest)
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/* The guest OS has shut down. */
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#define _XEN_DOMINF_shutdown 2
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#define XEN_DOMINF_shutdown (1U << _XEN_DOMINF_shutdown)
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/* Currently paused by control software. */
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#define _XEN_DOMINF_paused 3
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#define XEN_DOMINF_paused (1U << _XEN_DOMINF_paused)
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/* Currently blocked pending an event. */
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#define _XEN_DOMINF_blocked 4
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#define XEN_DOMINF_blocked (1U << _XEN_DOMINF_blocked)
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/* Domain is currently running. */
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#define _XEN_DOMINF_running 5
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#define XEN_DOMINF_running (1U << _XEN_DOMINF_running)
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/* Being debugged. */
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#define _XEN_DOMINF_debugged 6
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#define XEN_DOMINF_debugged (1U << _XEN_DOMINF_debugged)
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/* domain is a xenstore domain */
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#define _XEN_DOMINF_xs_domain 7
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#define XEN_DOMINF_xs_domain (1U << _XEN_DOMINF_xs_domain)
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/* domain has hardware assisted paging */
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#define _XEN_DOMINF_hap 8
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#define XEN_DOMINF_hap (1U << _XEN_DOMINF_hap)
|
||||
/* XEN_DOMINF_shutdown guest-supplied code. */
|
||||
#define XEN_DOMINF_shutdownmask 255
|
||||
#define XEN_DOMINF_shutdownshift 16
|
||||
uint32_t flags; /* XEN_DOMINF_* */
|
||||
uint64_aligned_t tot_pages;
|
||||
uint64_aligned_t max_pages;
|
||||
uint64_aligned_t outstanding_pages;
|
||||
uint64_aligned_t shr_pages;
|
||||
uint64_aligned_t paged_pages;
|
||||
uint64_aligned_t shared_info_frame; /* GMFN of shared_info struct */
|
||||
uint64_aligned_t cpu_time;
|
||||
uint32_t nr_online_vcpus; /* Number of VCPUs currently online. */
|
||||
#define XEN_INVALID_MAX_VCPU_ID (~0U) /* Domain has no vcpus? */
|
||||
uint32_t max_vcpu_id; /* Maximum VCPUID in use by this domain. */
|
||||
uint32_t ssidref;
|
||||
xen_domain_handle_t handle;
|
||||
uint32_t cpupool;
|
||||
uint8_t gpaddr_bits; /* Guest physical address space size. */
|
||||
uint8_t pad2[7];
|
||||
struct xen_arch_domainconfig arch_config;
|
||||
};
|
||||
typedef struct xen_domctl_getdomaininfo xen_domctl_getdomaininfo_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_domctl_getdomaininfo_t);
|
||||
|
||||
/*
|
||||
* Control shadow pagetables operation
|
||||
*/
|
||||
/* XEN_DOMCTL_shadow_op */
|
||||
|
||||
/* Memory allocation accessors. */
|
||||
#define XEN_DOMCTL_SHADOW_OP_GET_ALLOCATION 30
|
||||
#define XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION 31
|
||||
|
||||
struct xen_domctl_shadow_op_stats {
|
||||
uint32_t fault_count;
|
||||
uint32_t dirty_count;
|
||||
};
|
||||
|
||||
struct xen_domctl_shadow_op {
|
||||
/* IN variables. */
|
||||
uint32_t op; /* XEN_DOMCTL_SHADOW_OP_* */
|
||||
|
||||
/* OP_ENABLE: XEN_DOMCTL_SHADOW_ENABLE_* */
|
||||
/* OP_PEAK / OP_CLEAN: XEN_DOMCTL_SHADOW_LOGDIRTY_* */
|
||||
uint32_t mode;
|
||||
|
||||
/* OP_GET_ALLOCATION / OP_SET_ALLOCATION */
|
||||
uint32_t mb; /* Shadow memory allocation in MB */
|
||||
|
||||
/* OP_PEEK / OP_CLEAN */
|
||||
XEN_GUEST_HANDLE_64(uint8_t) dirty_bitmap;
|
||||
uint64_aligned_t pages; /* Size of buffer. Updated with actual size. */
|
||||
struct xen_domctl_shadow_op_stats stats;
|
||||
};
|
||||
|
||||
/* XEN_DOMCTL_max_mem */
|
||||
struct xen_domctl_max_mem {
|
||||
/* IN variables. */
|
||||
uint64_aligned_t max_memkb;
|
||||
};
|
||||
|
||||
/* XEN_DOMCTL_setvcpucontext */
|
||||
/* XEN_DOMCTL_getvcpucontext */
|
||||
struct xen_domctl_vcpucontext {
|
||||
uint32_t vcpu; /* IN */
|
||||
|
||||
XEN_GUEST_HANDLE_64(vcpu_guest_context_t) ctxt; /* IN/OUT */
|
||||
};
|
||||
|
||||
/*
|
||||
* XEN_DOMCTL_max_vcpus:
|
||||
*
|
||||
* The parameter passed to XEN_DOMCTL_max_vcpus must match the value passed to
|
||||
* XEN_DOMCTL_createdomain. This hypercall is in the process of being removed
|
||||
* (once the failure paths in domain_create() have been improved), but is
|
||||
* still required in the short term to allocate the vcpus themselves.
|
||||
*/
|
||||
struct xen_domctl_max_vcpus {
|
||||
uint32_t max; /* maximum number of vcpus */
|
||||
};
|
||||
|
||||
/* XEN_DOMCTL_scheduler_op */
|
||||
/* Scheduler types. */
|
||||
/* #define XEN_SCHEDULER_SEDF 4 (Removed) */
|
||||
#define XEN_SCHEDULER_CREDIT 5
|
||||
#define XEN_SCHEDULER_CREDIT2 6
|
||||
#define XEN_SCHEDULER_ARINC653 7
|
||||
#define XEN_SCHEDULER_RTDS 8
|
||||
#define XEN_SCHEDULER_NULL 9
|
||||
|
||||
struct xen_domctl_sched_credit {
|
||||
uint16_t weight;
|
||||
uint16_t cap;
|
||||
};
|
||||
|
||||
struct xen_domctl_sched_credit2 {
|
||||
uint16_t weight;
|
||||
uint16_t cap;
|
||||
};
|
||||
|
||||
struct xen_domctl_sched_rtds {
|
||||
uint32_t period;
|
||||
uint32_t budget;
|
||||
/* Can this vCPU execute beyond its reserved amount of time? */
|
||||
#define _XEN_DOMCTL_SCHEDRT_extra 0
|
||||
#define XEN_DOMCTL_SCHEDRT_extra (1U<<_XEN_DOMCTL_SCHEDRT_extra)
|
||||
uint32_t flags;
|
||||
};
|
||||
|
||||
typedef struct xen_domctl_schedparam_vcpu {
|
||||
union {
|
||||
struct xen_domctl_sched_credit credit;
|
||||
struct xen_domctl_sched_credit2 credit2;
|
||||
struct xen_domctl_sched_rtds rtds;
|
||||
} u;
|
||||
uint32_t vcpuid;
|
||||
} xen_domctl_schedparam_vcpu_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_domctl_schedparam_vcpu_t);
|
||||
|
||||
/*
|
||||
* Set or get info?
|
||||
* For schedulers supporting per-vcpu settings (e.g., RTDS):
|
||||
* XEN_DOMCTL_SCHEDOP_putinfo sets params for all vcpus;
|
||||
* XEN_DOMCTL_SCHEDOP_getinfo gets default params;
|
||||
* XEN_DOMCTL_SCHEDOP_put(get)vcpuinfo sets (gets) params of vcpus;
|
||||
*
|
||||
* For schedulers not supporting per-vcpu settings:
|
||||
* XEN_DOMCTL_SCHEDOP_putinfo sets params for all vcpus;
|
||||
* XEN_DOMCTL_SCHEDOP_getinfo gets domain-wise params;
|
||||
* XEN_DOMCTL_SCHEDOP_put(get)vcpuinfo returns error;
|
||||
*/
|
||||
#define XEN_DOMCTL_SCHEDOP_putinfo 0
|
||||
#define XEN_DOMCTL_SCHEDOP_getinfo 1
|
||||
#define XEN_DOMCTL_SCHEDOP_putvcpuinfo 2
|
||||
#define XEN_DOMCTL_SCHEDOP_getvcpuinfo 3
|
||||
struct xen_domctl_scheduler_op {
|
||||
uint32_t sched_id; /* XEN_SCHEDULER_* */
|
||||
uint32_t cmd; /* XEN_DOMCTL_SCHEDOP_* */
|
||||
/* IN/OUT */
|
||||
union {
|
||||
struct xen_domctl_sched_credit credit;
|
||||
struct xen_domctl_sched_credit2 credit2;
|
||||
struct xen_domctl_sched_rtds rtds;
|
||||
struct {
|
||||
XEN_GUEST_HANDLE_64(xen_domctl_schedparam_vcpu_t) vcpus;
|
||||
/*
|
||||
* IN: Number of elements in vcpus array.
|
||||
* OUT: Number of processed elements of vcpus array.
|
||||
*/
|
||||
uint32_t nr_vcpus;
|
||||
uint32_t padding;
|
||||
} v;
|
||||
} u;
|
||||
};
|
||||
|
||||
/* XEN_DOMCTL_iomem_permission */
|
||||
struct xen_domctl_iomem_permission {
|
||||
uint64_aligned_t first_mfn;/* first page (physical page number) in range */
|
||||
uint64_aligned_t nr_mfns; /* number of pages in range (>0) */
|
||||
uint8_t allow_access; /* allow (!0) or deny (0) access to range? */
|
||||
};
|
||||
|
||||
/* XEN_DOMCTL_set_address_size */
|
||||
/* XEN_DOMCTL_get_address_size */
|
||||
struct xen_domctl_address_size {
|
||||
uint32_t size;
|
||||
};
|
||||
|
||||
/* Assign a device to a guest. Sets up IOMMU structures. */
|
||||
/* XEN_DOMCTL_assign_device */
|
||||
/*
|
||||
* XEN_DOMCTL_test_assign_device: Pass DOMID_INVALID to find out whether the
|
||||
* given device is assigned to any DomU at all. Pass a specific domain ID to
|
||||
* find out whether the given device can be assigned to that domain.
|
||||
*/
|
||||
/*
|
||||
* XEN_DOMCTL_deassign_device: The behavior of this DOMCTL differs
|
||||
* between the different type of device:
|
||||
* - PCI device (XEN_DOMCTL_DEV_PCI) will be reassigned to DOM0
|
||||
* - DT device (XEN_DOMCTL_DEV_DT) will left unassigned. DOM0
|
||||
* will have to call XEN_DOMCTL_assign_device in order to use the
|
||||
* device.
|
||||
*/
|
||||
#define XEN_DOMCTL_DEV_PCI 0
|
||||
#define XEN_DOMCTL_DEV_DT 1
|
||||
struct xen_domctl_assign_device {
|
||||
/* IN */
|
||||
uint32_t dev; /* XEN_DOMCTL_DEV_* */
|
||||
uint32_t flags;
|
||||
#define XEN_DOMCTL_DEV_RDM_RELAXED 1 /* assign only */
|
||||
union {
|
||||
struct {
|
||||
uint32_t machine_sbdf; /* machine PCI ID of assigned device */
|
||||
} pci;
|
||||
struct {
|
||||
uint32_t size; /* Length of the path */
|
||||
|
||||
XEN_GUEST_HANDLE_64(char) path; /* path to the device tree node */
|
||||
} dt;
|
||||
} u;
|
||||
};
|
||||
|
||||
/* Pass-through interrupts: bind real irq -> hvm devfn. */
|
||||
/* XEN_DOMCTL_bind_pt_irq */
|
||||
/* XEN_DOMCTL_unbind_pt_irq */
|
||||
enum pt_irq_type {
|
||||
PT_IRQ_TYPE_PCI,
|
||||
PT_IRQ_TYPE_ISA,
|
||||
PT_IRQ_TYPE_MSI,
|
||||
PT_IRQ_TYPE_MSI_TRANSLATE,
|
||||
PT_IRQ_TYPE_SPI, /* ARM: valid range 32-1019 */
|
||||
};
|
||||
struct xen_domctl_bind_pt_irq {
|
||||
uint32_t machine_irq;
|
||||
uint32_t irq_type; /* enum pt_irq_type */
|
||||
|
||||
union {
|
||||
struct {
|
||||
uint8_t isa_irq;
|
||||
} isa;
|
||||
struct {
|
||||
uint8_t bus;
|
||||
uint8_t device;
|
||||
uint8_t intx;
|
||||
} pci;
|
||||
struct {
|
||||
uint8_t gvec;
|
||||
uint32_t gflags;
|
||||
#define XEN_DOMCTL_VMSI_X86_DEST_ID_MASK 0x0000ff
|
||||
#define XEN_DOMCTL_VMSI_X86_RH_MASK 0x000100
|
||||
#define XEN_DOMCTL_VMSI_X86_DM_MASK 0x000200
|
||||
#define XEN_DOMCTL_VMSI_X86_DELIV_MASK 0x007000
|
||||
#define XEN_DOMCTL_VMSI_X86_TRIG_MASK 0x008000
|
||||
#define XEN_DOMCTL_VMSI_X86_UNMASKED 0x010000
|
||||
|
||||
uint64_aligned_t gtable;
|
||||
} msi;
|
||||
struct {
|
||||
uint16_t spi;
|
||||
} spi;
|
||||
} u;
|
||||
};
|
||||
|
||||
|
||||
/* Bind machine I/O address range -> HVM address range. */
|
||||
/* XEN_DOMCTL_memory_mapping */
|
||||
/* Returns
|
||||
* - zero success, everything done
|
||||
* - -E2BIG passed in nr_mfns value too large for the implementation
|
||||
* - positive partial success for the first <result> page frames (with
|
||||
* <result> less than nr_mfns), requiring re-invocation by the
|
||||
* caller after updating inputs
|
||||
* - negative error; other than -E2BIG
|
||||
*/
|
||||
#define DPCI_ADD_MAPPING 1
|
||||
#define DPCI_REMOVE_MAPPING 0
|
||||
struct xen_domctl_memory_mapping {
|
||||
uint64_aligned_t first_gfn; /* first page (hvm guest phys page) in range */
|
||||
uint64_aligned_t first_mfn; /* first page (machine page) in range */
|
||||
uint64_aligned_t nr_mfns; /* number of pages in range (>0) */
|
||||
uint32_t add_mapping; /* add or remove mapping */
|
||||
uint32_t padding; /* padding for 64-bit aligned structure */
|
||||
};
|
||||
|
||||
/*
|
||||
* ARM: Clean and invalidate caches associated with given region of
|
||||
* guest memory.
|
||||
*/
|
||||
struct xen_domctl_cacheflush {
|
||||
/* IN: page range to flush. */
|
||||
xen_pfn_t start_pfn, nr_pfns;
|
||||
};
|
||||
|
||||
/*
|
||||
* XEN_DOMCTL_get_paging_mempool_size / XEN_DOMCTL_set_paging_mempool_size.
|
||||
*
|
||||
* Get or set the paging memory pool size. The size is in bytes.
|
||||
*
|
||||
* This is a dedicated pool of memory for Xen to use while managing the guest,
|
||||
* typically containing pagetables. As such, there is an implementation
|
||||
* specific minimum granularity.
|
||||
*
|
||||
* The set operation can fail mid-way through the request (e.g. Xen running
|
||||
* out of memory, no free memory to reclaim from the pool, etc.).
|
||||
*/
|
||||
struct xen_domctl_paging_mempool {
|
||||
uint64_aligned_t size; /* Size in bytes. */
|
||||
};
|
||||
|
||||
struct xen_domctl {
|
||||
uint32_t cmd;
|
||||
#define XEN_DOMCTL_createdomain 1
|
||||
#define XEN_DOMCTL_destroydomain 2
|
||||
#define XEN_DOMCTL_pausedomain 3
|
||||
#define XEN_DOMCTL_unpausedomain 4
|
||||
#define XEN_DOMCTL_getdomaininfo 5
|
||||
#define XEN_DOMCTL_setvcpuaffinity 9
|
||||
#define XEN_DOMCTL_shadow_op 10
|
||||
#define XEN_DOMCTL_max_mem 11
|
||||
#define XEN_DOMCTL_setvcpucontext 12
|
||||
#define XEN_DOMCTL_getvcpucontext 13
|
||||
#define XEN_DOMCTL_getvcpuinfo 14
|
||||
#define XEN_DOMCTL_max_vcpus 15
|
||||
#define XEN_DOMCTL_scheduler_op 16
|
||||
#define XEN_DOMCTL_setdomainhandle 17
|
||||
#define XEN_DOMCTL_setdebugging 18
|
||||
#define XEN_DOMCTL_irq_permission 19
|
||||
#define XEN_DOMCTL_iomem_permission 20
|
||||
#define XEN_DOMCTL_ioport_permission 21
|
||||
#define XEN_DOMCTL_hypercall_init 22
|
||||
#define XEN_DOMCTL_settimeoffset 24
|
||||
#define XEN_DOMCTL_getvcpuaffinity 25
|
||||
#define XEN_DOMCTL_real_mode_area 26 /* Obsolete PPC only */
|
||||
#define XEN_DOMCTL_resumedomain 27
|
||||
#define XEN_DOMCTL_sendtrigger 28
|
||||
#define XEN_DOMCTL_subscribe 29
|
||||
#define XEN_DOMCTL_gethvmcontext 33
|
||||
#define XEN_DOMCTL_sethvmcontext 34
|
||||
#define XEN_DOMCTL_set_address_size 35
|
||||
#define XEN_DOMCTL_get_address_size 36
|
||||
#define XEN_DOMCTL_assign_device 37
|
||||
#define XEN_DOMCTL_bind_pt_irq 38
|
||||
#define XEN_DOMCTL_memory_mapping 39
|
||||
#define XEN_DOMCTL_ioport_mapping 40
|
||||
#define XEN_DOMCTL_set_ext_vcpucontext 42
|
||||
#define XEN_DOMCTL_get_ext_vcpucontext 43
|
||||
#define XEN_DOMCTL_set_opt_feature 44 /* Obsolete IA64 only */
|
||||
#define XEN_DOMCTL_test_assign_device 45
|
||||
#define XEN_DOMCTL_set_target 46
|
||||
#define XEN_DOMCTL_deassign_device 47
|
||||
#define XEN_DOMCTL_unbind_pt_irq 48
|
||||
#define XEN_DOMCTL_get_device_group 50
|
||||
#define XEN_DOMCTL_debug_op 54
|
||||
#define XEN_DOMCTL_gethvmcontext_partial 55
|
||||
#define XEN_DOMCTL_vm_event_op 56
|
||||
#define XEN_DOMCTL_mem_sharing_op 57
|
||||
#define XEN_DOMCTL_gettscinfo 59
|
||||
#define XEN_DOMCTL_settscinfo 60
|
||||
#define XEN_DOMCTL_getpageframeinfo3 61
|
||||
#define XEN_DOMCTL_setvcpuextstate 62
|
||||
#define XEN_DOMCTL_getvcpuextstate 63
|
||||
#define XEN_DOMCTL_set_access_required 64
|
||||
#define XEN_DOMCTL_audit_p2m 65
|
||||
#define XEN_DOMCTL_set_virq_handler 66
|
||||
#define XEN_DOMCTL_set_broken_page_p2m 67
|
||||
#define XEN_DOMCTL_setnodeaffinity 68
|
||||
#define XEN_DOMCTL_getnodeaffinity 69
|
||||
#define XEN_DOMCTL_cacheflush 71
|
||||
#define XEN_DOMCTL_get_vcpu_msrs 72
|
||||
#define XEN_DOMCTL_set_vcpu_msrs 73
|
||||
#define XEN_DOMCTL_setvnumainfo 74
|
||||
#define XEN_DOMCTL_psr_cmt_op 75
|
||||
#define XEN_DOMCTL_monitor_op 77
|
||||
#define XEN_DOMCTL_psr_alloc 78
|
||||
#define XEN_DOMCTL_soft_reset 79
|
||||
#define XEN_DOMCTL_vuart_op 81
|
||||
#define XEN_DOMCTL_get_cpu_policy 82
|
||||
#define XEN_DOMCTL_set_cpu_policy 83
|
||||
#define XEN_DOMCTL_vmtrace_op 84
|
||||
#define XEN_DOMCTL_get_paging_mempool_size 85
|
||||
#define XEN_DOMCTL_set_paging_mempool_size 86
|
||||
#define XEN_DOMCTL_gdbsx_guestmemio 1000
|
||||
#define XEN_DOMCTL_gdbsx_pausevcpu 1001
|
||||
#define XEN_DOMCTL_gdbsx_unpausevcpu 1002
|
||||
#define XEN_DOMCTL_gdbsx_domstatus 1003
|
||||
uint32_t interface_version; /* XEN_DOMCTL_INTERFACE_VERSION */
|
||||
domid_t domain;
|
||||
uint16_t _pad[3];
|
||||
union {
|
||||
struct xen_domctl_createdomain createdomain;
|
||||
struct xen_domctl_getdomaininfo getdomaininfo;
|
||||
struct xen_domctl_max_mem max_mem;
|
||||
struct xen_domctl_vcpucontext vcpucontext;
|
||||
struct xen_domctl_max_vcpus max_vcpus;
|
||||
struct xen_domctl_scheduler_op scheduler_op;
|
||||
struct xen_domctl_iomem_permission iomem_permission;
|
||||
struct xen_domctl_address_size address_size;
|
||||
struct xen_domctl_assign_device assign_device;
|
||||
struct xen_domctl_bind_pt_irq bind_pt_irq;
|
||||
struct xen_domctl_memory_mapping memory_mapping;
|
||||
struct xen_domctl_cacheflush cacheflush;
|
||||
struct xen_domctl_paging_mempool paging_mempool;
|
||||
uint8_t pad[128];
|
||||
} u;
|
||||
};
|
||||
typedef struct xen_domctl xen_domctl_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_domctl_t);
|
||||
|
||||
#endif /* __XEN_PUBLIC_DOMCTL_H__ */
|
|
@ -69,6 +69,40 @@ struct xen_memory_reservation {
|
|||
typedef struct xen_memory_reservation xen_memory_reservation_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_memory_reservation_t);
|
||||
|
||||
/* A batched version of add_to_physmap. */
|
||||
#define XENMEM_add_to_physmap_batch 23
|
||||
struct xen_add_to_physmap_batch {
|
||||
/* IN */
|
||||
/* Which domain to change the mapping for. */
|
||||
domid_t domid;
|
||||
uint16_t space; /* => enum phys_map_space */
|
||||
|
||||
/* Number of pages to go through */
|
||||
uint16_t size;
|
||||
|
||||
#if __XEN_INTERFACE_VERSION__ < 0x00040700
|
||||
domid_t foreign_domid; /* IFF gmfn_foreign. Should be 0 for other spaces. */
|
||||
#else
|
||||
union xen_add_to_physmap_batch_extra {
|
||||
domid_t foreign_domid; /* gmfn_foreign */
|
||||
uint16_t res0; /* All the other spaces. Should be 0 */
|
||||
} u;
|
||||
#endif
|
||||
|
||||
/* Indexes into space being mapped. */
|
||||
XEN_GUEST_HANDLE(xen_ulong_t) idxs;
|
||||
|
||||
/* GPFN in domid where the source mapping page should appear. */
|
||||
XEN_GUEST_HANDLE(xen_pfn_t) gpfns;
|
||||
|
||||
/* OUT */
|
||||
/* Per index error code. */
|
||||
XEN_GUEST_HANDLE(int) errs;
|
||||
};
|
||||
typedef struct xen_add_to_physmap_batch xen_add_to_physmap_batch_t;
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_add_to_physmap_batch_t);
|
||||
|
||||
|
||||
#define XENMAPSPACE_shared_info 0 /* shared info page */
|
||||
#define XENMAPSPACE_grant_table 1 /* grant table page */
|
||||
#define XENMAPSPACE_gmfn 2 /* GMFN */
|
||||
|
|
|
@ -47,6 +47,7 @@ __DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long);
|
|||
#endif
|
||||
DEFINE_XEN_GUEST_HANDLE(void);
|
||||
|
||||
DEFINE_XEN_GUEST_HANDLE(uint8_t);
|
||||
DEFINE_XEN_GUEST_HANDLE(uint64_t);
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_pfn_t);
|
||||
DEFINE_XEN_GUEST_HANDLE(xen_ulong_t);
|
||||
|
@ -371,6 +372,26 @@ struct shared_info {
|
|||
typedef struct shared_info shared_info_t;
|
||||
#endif
|
||||
|
||||
typedef uint8_t xen_domain_handle_t[16];
|
||||
|
||||
#ifndef int64_aligned_t
|
||||
#define int64_aligned_t int64_t
|
||||
#endif
|
||||
#ifndef uint64_aligned_t
|
||||
#define uint64_aligned_t uint64_t
|
||||
#endif
|
||||
#ifndef XEN_GUEST_HANDLE_64
|
||||
#define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name)
|
||||
#endif
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
struct xenctl_bitmap {
|
||||
XEN_GUEST_HANDLE_64(uint8_t) bitmap;
|
||||
uint32_t nr_bits;
|
||||
};
|
||||
typedef struct xenctl_bitmap xenctl_bitmap_t;
|
||||
#endif
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#endif /* __XEN_PUBLIC_XEN_H__ */
|
||||
|
|
Loading…
Reference in a new issue