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drivers: watchdog: stm32H7 window watchdog during debug

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This commit is controlling the WWDG during the Stop mode in debug.
WWDG1 is frozen while the core is in Debug mode, setting the bit
of the DBGMCU APB3 peripheral freeze register (DBGMCU_APB3FZ1)
for the stm32H7 soc devices.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is contained in:
Francois Ramu 2021-11-26 14:16:32 +01:00 committed by Anas Nashif
parent aad0f000c6
commit 0d84e7b2bc
1 changed files with 4 additions and 0 deletions
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4
drivers/watchdog/wdt_wwdg_stm32.c
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@ -169,7 +169,11 @@ static int wwdg_stm32_setup(const struct device *dev, uint8_t options)
#elif defined(CONFIG_SOC_SERIES_STM32L0X)
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU);
#endif
#if defined(CONFIG_SOC_SERIES_STM32H7X)
LL_DBGMCU_APB3_GRP1_FreezePeriph(LL_DBGMCU_APB3_GRP1_WWDG1_STOP);
#else
LL_DBGMCU_APB1_GRP1_FreezePeriph(LL_DBGMCU_APB1_GRP1_WWDG_STOP);
#endif /* CONFIG_SOC_SERIES_STM32H7X */
}
if (options & WDT_OPT_PAUSE_IN_SLEEP) {