soc: migrate includes to <zephyr/...>

In order to bring consistency in-tree, migrate all soc code to the
new prefix <zephyr/...>. Note that the conversion has been scripted,
refer to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

soc/arc/snps_arc_hsdk/soc.c

@@ -8,8 +8,8 @@
  * This module provides routines to initialize and support soc-level hardware
  * for the HS Development Kit
  */
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include "soc.h"
 
 static int arc_hsdk_init(const struct device *dev)

soc/arc/snps_arc_hsdk/soc.h

@@ -14,7 +14,7 @@
 #ifndef _SOC_H_
 #define _SOC_H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 
 /* ARC HS Core IRQs */
@@ -25,8 +25,8 @@
 #ifndef _ASMLANGUAGE
 
 
-#include <sys/util.h>
-#include <random/rand32.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/random/rand32.h>
 
 /* PINMUX IO Hardware Functions */
 #define HSDK_PINMUX_FUNS		8

soc/arc/snps_arc_iot/soc.c

@@ -9,8 +9,8 @@
  * for the IoT Development Kit board.
  *
  */
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include "sysconf.h"
 
 #define CPU_FREQ DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency)

soc/arc/snps_arc_iot/soc.h

@@ -14,7 +14,7 @@
 #ifndef _SOC_H_
 #define _SOC_H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 /* default system clock */
 #define SYSCLK_DEFAULT_IOSC_HZ			MHZ(16)
@@ -36,8 +36,8 @@
 #ifndef _ASMLANGUAGE
 
 
-#include <sys/util.h>
-#include <random/rand32.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/random/rand32.h>
 
 
 #endif /* !_ASMLANGUAGE */

soc/arc/snps_emsdp/soc.h

@@ -14,7 +14,7 @@
 #ifndef _SOC_H_
 #define _SOC_H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 /* default system clock */
 #define SYSCLK_DEFAULT_IOSC_HZ			MHZ(100)
@@ -26,8 +26,8 @@
 
 #ifndef _ASMLANGUAGE
 
-#include <sys/util.h>
-#include <random/rand32.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/random/rand32.h>
 
 #endif /* !_ASMLANGUAGE */
 

soc/arc/snps_emsk/soc.h

@@ -14,7 +14,7 @@
 #ifndef _SOC__H_
 #define _SOC__H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 /* default system clock */
 /* On the EM Starter Kit board, the peripheral bus clock frequency is 50Mhz */
@@ -39,8 +39,8 @@
 
 #ifndef _ASMLANGUAGE
 
-#include <sys/util.h>
-#include <random/rand32.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/random/rand32.h>
 
 #define INT_ENABLE_ARC				~(0x00000001 << 8)
 #define INT_ENABLE_ARC_BIT_POS			(8)

soc/arc/snps_emsk/soc_config.c

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include "soc.h"
 
 

soc/arc/snps_nsim/soc.c

@@ -12,8 +12,8 @@
  *
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include "soc.h"
 
 #ifdef CONFIG_SMP

soc/arc/snps_nsim/soc.h

@@ -14,7 +14,7 @@
 #ifndef _SOC__H_
 #define _SOC__H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 /* ARC EM Core IRQs */
 #define IRQ_TIMER0				16
@@ -24,8 +24,8 @@
 
 #ifndef _ASMLANGUAGE
 
-#include <sys/util.h>
-#include <random/rand32.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/random/rand32.h>
 
 #define INT_ENABLE_ARC				~(0x00000001 << 8)
 #define INT_ENABLE_ARC_BIT_POS			(8)

soc/arc/snps_nsim/soc_config.c

@@ -4,6 +4,6 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include "soc.h"

soc/arm/arm/beetle/power.c

@@ -4,12 +4,12 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
-#include <pm/pm.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
+#include <zephyr/pm/pm.h>
 #include <soc.h>
 #include <soc_power.h>
-#include <arch/cpu.h>
+#include <zephyr/arch/cpu.h>
 
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(gpio0), okay)
 #define CLK_BIT_GPIO0	_BEETLE_GPIO0

soc/arm/arm/beetle/soc.c

@@ -12,12 +12,12 @@
  * for the ARM LTD Beetle SoC.
  */
 
-#include <kernel.h>
-#include <device.h>
-#include <init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
 
-#include <arch/cpu.h>
+#include <zephyr/arch/cpu.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.

soc/arm/arm/beetle/soc.h

@@ -12,7 +12,7 @@
 #ifndef _ARM_BEETLE_SOC_H_
 #define _ARM_BEETLE_SOC_H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 #ifndef _ASMLANGUAGE
 #include "CMSDK_BEETLE.h"

soc/arm/arm/designstart/soc.c

@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
+#include <zephyr/device.h>
 
 static int arm_designstart_init(const struct device *arg)
 {

soc/arm/arm/mps2/soc.c

@@ -7,11 +7,11 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <arch/cpu.h>
-#include <drivers/gpio/gpio_mmio32.h>
-#include <init.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/drivers/gpio/gpio_mmio32.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <linker/linker-defs.h>
+#include <zephyr/linker/linker-defs.h>
 
 
 /* Setup GPIO drivers for accessing FPGAIO registers */

soc/arm/arm/mps2/soc_registers.h

@@ -12,7 +12,7 @@
 #ifndef _ARM_MPS2_REGS_H_
 #define _ARM_MPS2_REGS_H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 #include <zephyr/types.h>
 
 /* Registers in the FPGA system control block */

soc/arm/arm/mps3/soc.c

@@ -4,11 +4,11 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <arch/cpu.h>
-#include <drivers/gpio/gpio_mmio32.h>
-#include <init.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/drivers/gpio/gpio_mmio32.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <linker/linker-defs.h>
+#include <zephyr/linker/linker-defs.h>
 
 
 /* Setup GPIO drivers for accessing FPGAIO registers */

soc/arm/arm/musca_b1/soc.c

@@ -4,10 +4,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <arch/cpu.h>
-#include <init.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <linker/linker-defs.h>
+#include <zephyr/linker/linker-defs.h>
 
 /* (Secure System Control) Base Address */
 #define SSE_200_SYSTEM_CTRL_S_BASE	(0x50021000UL)

soc/arm/arm/musca_b1/soc.h

@@ -9,7 +9,7 @@
 
 #ifndef _ASMLANGUAGE
 #include "system_cmsdk_musca_b1.h"
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 #endif
 
 extern void wakeup_cpu1(void);

soc/arm/arm/musca_s1/soc.c

@@ -4,8 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <arch/cpu.h>
-#include <init.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/init.h>
 #include <soc.h>
 
 /**

soc/arm/arm/musca_s1/soc.h

@@ -9,7 +9,7 @@
 
 #ifndef _ASMLANGUAGE
 #include "system_cmsdk_musca_s1.h"
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 #endif
 
 #endif /* _SOC_H_ */

soc/arm/aspeed/aspeed_util.h

@@ -5,9 +5,9 @@
  */
 #ifndef ZEPHYR_SOC_ARM_ASPEED_UTIL_H_
 #define ZEPHYR_SOC_ARM_ASPEED_UTIL_H_
-#include <sys/util.h>
-#include <devicetree.h>
-#include <toolchain/gcc.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/devicetree.h>
+#include <zephyr/toolchain/gcc.h>
 
 /* gcc.h doesn't define __section but checkpatch.pl will complain for this. so
  * temporarily add a macro here.

soc/arm/aspeed/ast10x0/soc.c

@@ -4,13 +4,13 @@
  * Copyright (c) 2021 ASPEED Technology Inc.
  */
 
-#include <init.h>
-#include <kernel.h>
+#include <zephyr/init.h>
+#include <zephyr/kernel.h>
 #include <stdint.h>
 #include <string.h>
-#include <linker/linker-defs.h>
-#include <device.h>
-#include <cache.h>
+#include <zephyr/linker/linker-defs.h>
+#include <zephyr/device.h>
+#include <zephyr/cache.h>
 #include <soc.h>
 
 extern char __bss_nc_start__[];

soc/arm/atmel_sam/common/atmel_sam_dt.h

@@ -11,7 +11,7 @@
 #ifndef _ATMEL_SAM_DT_H_
 #define _ATMEL_SAM_DT_H_
 
-#include <devicetree.h>
+#include <zephyr/devicetree.h>
 
 /* Devicetree macros related to clock */
 

soc/arm/atmel_sam/common/pinctrl_soc.h

@@ -12,6 +12,6 @@
 #ifndef ZEPHYR_SOC_ARM_ATMEL_SAM_COMMON_PINCTRL_SOC_H_
 #define ZEPHYR_SOC_ARM_ATMEL_SAM_COMMON_PINCTRL_SOC_H_
 
-#include <drivers/pinctrl/pinctrl_soc_sam_common.h>
+#include <zephyr/drivers/pinctrl/pinctrl_soc_sam_common.h>
 
 #endif /* ZEPHYR_SOC_ARM_ATMEL_SAM_COMMON_PINCTRL_SOC_H_ */

soc/arm/atmel_sam/common/soc_gpio.c

@@ -8,7 +8,7 @@
  * module HAL driver.
  */
 
-#include <sys/__assert.h>
+#include <zephyr/sys/__assert.h>
 #include "soc_gpio.h"
 
 /*

soc/arm/atmel_sam/common/soc_pmc.c

@@ -9,8 +9,8 @@
  */
 
 #include <soc.h>
-#include <sys/__assert.h>
-#include <sys/util.h>
+#include <zephyr/sys/__assert.h>
+#include <zephyr/sys/util.h>
 
 #if ID_PERIPH_COUNT > 74
 #error "Unsupported SoC, update soc_pmc.c functions"

soc/arm/atmel_sam/common/soc_sam4l_gpio.c

@@ -8,7 +8,7 @@
  * module HAL driver.
  */
 
-#include <sys/__assert.h>
+#include <zephyr/sys/__assert.h>
 #include "soc_gpio.h"
 
 static void configure_common_attr(volatile Gpio *gpio,

soc/arm/atmel_sam/common/soc_sam4l_pm.c

@@ -9,8 +9,8 @@
  */
 
 #include <soc.h>
-#include <sys/__assert.h>
-#include <sys/util.h>
+#include <zephyr/sys/__assert.h>
+#include <zephyr/sys/util.h>
 
 /**
  * SAM4L define peripheral-ids out of order.  This maps peripheral-id group

soc/arm/atmel_sam/sam3x/soc.c

@@ -13,12 +13,12 @@
  * for the Atmel SAM3X series processor.
  */
 
-#include <kernel.h>
-#include <device.h>
-#include <init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/cpu.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 
 /*
  * PLL clock = Main * (MULA + 1) / DIVA

soc/arm/atmel_sam/sam4e/soc.c

@@ -15,11 +15,11 @@
  * for the Atmel SAM4E series processor.
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/cpu.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 
 /**
  * @brief Setup various clock on SoC at boot time.

soc/arm/atmel_sam/sam4e/soc.h

@@ -15,7 +15,7 @@
 #ifndef _ATMEL_SAM4E_SOC_H_
 #define _ATMEL_SAM4E_SOC_H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 #ifndef _ASMLANGUAGE
 

soc/arm/atmel_sam/sam4l/soc.c

@@ -11,10 +11,10 @@
  * for the Atmel SAM4L series processor.
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/cpu.h>
+#include <zephyr/arch/cpu.h>
 
 /** Watchdog control register first write keys */
 #define WDT_FIRST_KEY     0x55ul

soc/arm/atmel_sam/sam4s/soc.c

@@ -14,11 +14,11 @@
  * for the Atmel SAM4S series processor.
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/cpu.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 
 /**
  * @brief Setup various clock on SoC at boot time.

soc/arm/atmel_sam/sam4s/soc.h

@@ -15,7 +15,7 @@
 #ifndef _ATMEL_SAM4S_SOC_H_
 #define _ATMEL_SAM4S_SOC_H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 #ifndef _ASMLANGUAGE
 

soc/arm/atmel_sam/same70/soc.c

@@ -10,12 +10,12 @@
  * for the Atmel SAM E70 MCU.
  */
 
-#include <kernel.h>
-#include <device.h>
-#include <init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
-#include <logging/log.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/logging/log.h>
 
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
 LOG_MODULE_REGISTER(soc);

soc/arm/atmel_sam/same70/soc.h

@@ -13,7 +13,7 @@
 #ifndef _ATMEL_SAME70_SOC_H_
 #define _ATMEL_SAME70_SOC_H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 #ifndef _ASMLANGUAGE
 

soc/arm/atmel_sam/same70/soc_config.c

@@ -7,10 +7,10 @@
  * @brief System module to support early Atmel SAM E70 MCU configuration
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/cpu.h>
+#include <zephyr/arch/cpu.h>
 
 /**
  * @brief Perform SoC configuration at boot.

soc/arm/atmel_sam/samv71/soc.c

@@ -11,12 +11,12 @@
  * for the Atmel SAM V71 MCU.
  */
 
-#include <kernel.h>
-#include <device.h>
-#include <init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
-#include <logging/log.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/logging/log.h>
 
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
 LOG_MODULE_REGISTER(soc);

soc/arm/atmel_sam/samv71/soc.h

@@ -14,7 +14,7 @@
 #ifndef _ATMEL_SAMV71_SOC_H_
 #define _ATMEL_SAMV71_SOC_H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 #ifndef _ASMLANGUAGE
 

soc/arm/atmel_sam/samv71/soc_config.c

@@ -8,10 +8,10 @@
  * @brief System module to support early Atmel SAM V71 MCU configuration
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/cpu.h>
+#include <zephyr/arch/cpu.h>
 
 /**
  * @brief Perform SoC configuration at boot.

soc/arm/atmel_sam0/common/bossa.c

@@ -5,9 +5,9 @@
  */
 
 #include <soc.h>
-#include <drivers/uart/cdc_acm.h>
-#include <drivers/usb/usb_dc.h>
-#include <usb/class/usb_cdc.h>
+#include <zephyr/drivers/uart/cdc_acm.h>
+#include <zephyr/drivers/usb/usb_dc.h>
+#include <zephyr/usb/class/usb_cdc.h>
 
 /*
  * Magic value that causes the bootloader to stay in bootloader mode instead of

soc/arm/atmel_sam0/common/pinctrl_soc.h

@@ -12,6 +12,6 @@
 #ifndef ZEPHYR_SOC_ARM_ATMEL_SAM_COMMON_PINCTRL_SOC_H_
 #define ZEPHYR_SOC_ARM_ATMEL_SAM_COMMON_PINCTRL_SOC_H_
 
-#include <drivers/pinctrl/pinctrl_soc_sam_common.h>
+#include <zephyr/drivers/pinctrl/pinctrl_soc_sam_common.h>
 
 #endif /* ZEPHYR_SOC_ARM_ATMEL_SAM_COMMON_PINCTRL_SOC_H_ */

soc/arm/atmel_sam0/common/soc_samd2x.c

@@ -9,11 +9,11 @@
  * @brief Atmel SAMD MCU series initialization code
  */
 
-#include <arch/cpu.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
-#include <device.h>
-#include <init.h>
-#include <kernel.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
+#include <zephyr/kernel.h>
 #include <soc.h>
 
 static void flash_waitstates_init(void)

soc/arm/atmel_sam0/common/soc_samd5x.c

@@ -9,10 +9,10 @@
  * @brief Atmel SAMD MCU series initialization code
  */
 
-#include <arch/cpu.h>
-#include <device.h>
-#include <init.h>
-#include <kernel.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
+#include <zephyr/kernel.h>
 #include <soc.h>
 
 #define SAM0_DFLL_FREQ_HZ		(48000000U)

soc/arm/bcm_vk/valkyrie/soc.c

@@ -3,10 +3,10 @@
  * Copyright 2018 Broadcom.
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/cpu.h>
+#include <zephyr/arch/cpu.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.

soc/arm/bcm_vk/valkyrie/soc.h

@@ -6,8 +6,8 @@
 #ifndef SOC_H
 #define SOC_H
 
-#include <sys/util.h>
-#include <toolchain.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/toolchain.h>
 
 #ifndef _ASMLANGUAGE
 

soc/arm/bcm_vk/viper/soc.c

@@ -4,10 +4,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <arch/cpu.h>
+#include <zephyr/arch/cpu.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.

soc/arm/bcm_vk/viper/soc.h

@@ -7,8 +7,8 @@
 #ifndef SOC_H
 #define SOC_H
 
-#include <sys/util.h>
-#include <toolchain.h>
+#include <zephyr/sys/util.h>
+#include <zephyr/toolchain.h>
 
 #ifndef _ASMLANGUAGE
 

soc/arm/common/cortex_m/arm_mpu_mem_cfg.h

@@ -6,7 +6,7 @@
 #ifndef _ARM_CORTEX_M_MPU_MEM_CFG_H_
 #define _ARM_CORTEX_M_MPU_MEM_CFG_H_
 
-#include <arch/arm/aarch32/mpu/arm_mpu.h>
+#include <zephyr/arch/arm/aarch32/mpu/arm_mpu.h>
 
 #if !defined(CONFIG_ARMV8_M_BASELINE) && !defined(CONFIG_ARMV8_M_MAINLINE)
 

soc/arm/common/cortex_m/arm_mpu_regions.c

@@ -4,9 +4,9 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <sys/slist.h>
-#include <arch/arm/aarch32/mpu/arm_mpu.h>
-#include <linker/devicetree_regions.h>
+#include <zephyr/sys/slist.h>
+#include <zephyr/arch/arm/aarch32/mpu/arm_mpu.h>
+#include <zephyr/linker/devicetree_regions.h>
 
 #include "arm_mpu_mem_cfg.h"
 

soc/arm/cypress/common/cypress_psoc6_dt.h

@@ -12,7 +12,7 @@
 #ifndef _CYPRESS_PSOC6_DT_H_
 #define _CYPRESS_PSOC6_DT_H_
 
-#include <devicetree.h>
+#include <zephyr/devicetree.h>
 
 /*
  * Devicetree macros related to interrupt

soc/arm/cypress/psoc6/soc.c

@@ -4,10 +4,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
-#include <arch/cpu.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 
 #include "cy_syslib.h"
 #include "cy_gpio.h"

soc/arm/cypress/psoc6/soc.h

@@ -15,7 +15,7 @@
 #ifndef _SOC__H_
 #define _SOC__H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 #ifndef _ASMLANGUAGE
 

soc/arm/gigadevice/common/pinctrl_soc.h

@@ -12,6 +12,6 @@
 #ifndef ZEPHYR_SOC_ARM_GIGADEVICE_COMMON_PINCTRL_SOC_H_
 #define ZEPHYR_SOC_ARM_GIGADEVICE_COMMON_PINCTRL_SOC_H_
 
-#include <drivers/pinctrl/pinctrl_soc_gd32_common.h>
+#include <zephyr/drivers/pinctrl/pinctrl_soc_gd32_common.h>
 
 #endif /* ZEPHYR_SOC_ARM_GIGADEVICE_COMMON_PINCTRL_SOC_H_ */

soc/arm/gigadevice/gd32e10x/soc.c

@@ -3,8 +3,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
 
 static int gd32e10x_soc_init(const struct device *dev)

soc/arm/gigadevice/gd32f3x0/soc.c

@@ -3,8 +3,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
 
 static int gd32f3x0_init(const struct device *dev)

soc/arm/gigadevice/gd32f403/soc.c

@@ -11,8 +11,8 @@
  * hardware for the GigaDevice GD32 SoC.
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 
 /**
  * @brief Perform basic hardware initialization at boot.

soc/arm/gigadevice/gd32f403/soc.h

@@ -10,7 +10,7 @@
 #ifndef _SOC__H_
 #define _SOC__H_
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 #ifndef _ASMLANGUAGE
 #include <gd32f403.h>

soc/arm/gigadevice/gd32f4xx/soc.c

@@ -3,8 +3,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 
 static int gd32f4xx_soc_init(const struct device *dev)
 {

soc/arm/infineon_xmc/4xxx/soc.c

@@ -6,8 +6,8 @@
  *
  */
 
-#include <kernel.h>
-#include <init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/init.h>
 #include <soc.h>
 
 #define PMU_FLASH_WS		(0x3U)

soc/arm/microchip_mec/common/pinctrl_soc.h

@@ -14,10 +14,10 @@
 #ifndef ZEPHYR_SOC_ARM_MICROCHIP_XEC_COMMON_PINCTRL_SOC_H_
 #define ZEPHYR_SOC_ARM_MICROCHIP_XEC_COMMON_PINCTRL_SOC_H_
 
-#include <devicetree.h>
+#include <zephyr/devicetree.h>
 #include <zephyr/types.h>
 
-#include <dt-bindings/pinctrl/mchp-xec-pinctrl.h>
+#include <zephyr/dt-bindings/pinctrl/mchp-xec-pinctrl.h>
 
 #ifdef __cplusplus
 extern "C" {

soc/arm/microchip_mec/common/soc_espi_saf.h

@@ -12,7 +12,7 @@
 #define _SOC_ESPI_SAF_H_
 
 #include <stdint.h>
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 #include <soc.h>
 
 #define MCHP_SAF_MAX_FLASH_DEVICES 2U

soc/arm/microchip_mec/common/soc_i2c.c

@@ -4,9 +4,9 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <zephyr.h>
-#include <sys/sys_io.h>
-#include <sys/__assert.h>
+#include <zephyr/zephyr.h>
+#include <zephyr/sys/sys_io.h>
+#include <zephyr/sys/__assert.h>
 #include <soc.h>
 #include "soc_i2c.h"
 

soc/arm/microchip_mec/mec1501/device_power.c

@@ -5,10 +5,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <zephyr.h>
-#include <sys/sys_io.h>
-#include <sys/__assert.h>
-#include <pm/pm.h>
+#include <zephyr/zephyr.h>
+#include <zephyr/sys/sys_io.h>
+#include <zephyr/sys/__assert.h>
+#include <zephyr/pm/pm.h>
 #include <soc.h>
 
 /*

soc/arm/microchip_mec/mec1501/power.c

@@ -5,10 +5,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <zephyr.h>
-#include <sys/sys_io.h>
-#include <sys/__assert.h>
-#include <pm/pm.h>
+#include <zephyr/zephyr.h>
+#include <zephyr/sys/sys_io.h>
+#include <zephyr/sys/__assert.h>
+#include <zephyr/pm/pm.h>
 #include <soc.h>
 #include "device_power.h"
 

soc/arm/microchip_mec/mec1501/soc.c

@@ -4,12 +4,12 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <kernel.h>
-#include <arch/cpu.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/kernel.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 
 /* MEC devices IDs with special PLL handling */
 #define MCHP_GCFG_DID_DEV_ID_MEC150x    0x0020U

soc/arm/microchip_mec/mec1501/timing.c

@@ -4,10 +4,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <arch/arm/aarch32/arch.h>
-#include <kernel.h>
-#include <sys_clock.h>
-#include <timing/timing.h>
+#include <zephyr/arch/arm/aarch32/arch.h>
+#include <zephyr/kernel.h>
+#include <zephyr/sys_clock.h>
+#include <zephyr/timing/timing.h>
 #include <soc.h>
 
 void soc_timing_init(void)

soc/arm/microchip_mec/mec1701/soc.c

@@ -4,10 +4,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <init.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <kernel.h>
+#include <zephyr/kernel.h>
 
 
 static int soc_init(const struct device *dev)

soc/arm/microchip_mec/mec172x/reg/mec172x_ecia.h

@@ -9,7 +9,7 @@
 
 #include <stdint.h>
 #include <stddef.h>
-#include <devicetree.h>
+#include <zephyr/devicetree.h>
 
 #define ECIA_BASE_ADDR			DT_REG_ADDR(DT_NODELABEL(ecia))
 

soc/arm/microchip_mec/mec172x/soc.c

@@ -4,13 +4,13 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <sys/__assert.h>
-#include <device.h>
-#include <init.h>
+#include <zephyr/sys/__assert.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <kernel.h>
-#include <arch/cpu.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/kernel.h>
+#include <zephyr/arch/cpu.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 
 static int soc_init(const struct device *dev)
 {

soc/arm/microchip_mec/mec172x/soc.h

@@ -242,7 +242,7 @@ typedef enum {
 	MAX_IRQn
 } IRQn_Type;
 
-#include <sys/util.h>
+#include <zephyr/sys/util.h>
 
 /* chip specific register defines */
 #include "reg/mec172x_defs.h"

soc/arm/microchip_mec/mec172x/timing.c

@@ -5,10 +5,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <arch/arm/aarch32/arch.h>
-#include <kernel.h>
-#include <sys_clock.h>
-#include <timing/timing.h>
+#include <zephyr/arch/arm/aarch32/arch.h>
+#include <zephyr/kernel.h>
+#include <zephyr/sys_clock.h>
+#include <zephyr/timing/timing.h>
 #include <soc.h>
 
 /*

soc/arm/nordic_nrf/common/pinctrl_soc.h

@@ -12,8 +12,8 @@
 #ifndef ZEPHYR_SOC_ARM_NORDIC_NRF_COMMON_PINCTRL_SOC_H_
 #define ZEPHYR_SOC_ARM_NORDIC_NRF_COMMON_PINCTRL_SOC_H_
 
-#include <devicetree.h>
-#include <dt-bindings/pinctrl/nrf-pinctrl.h>
+#include <zephyr/devicetree.h>
+#include <zephyr/dt-bindings/pinctrl/nrf-pinctrl.h>
 #include <zephyr/types.h>
 
 #ifdef __cplusplus

soc/arm/nordic_nrf/common/soc_nrf_common.h

@@ -12,8 +12,8 @@
 
 #ifndef _ASMLANGUAGE
 #include <nrfx.h>
-#include <devicetree.h>
-#include <toolchain.h>
+#include <zephyr/devicetree.h>
+#include <zephyr/toolchain.h>
 
 /**
  * @brief Get a PSEL value out of a foo-gpios or foo-pin devicetree property

soc/arm/nordic_nrf/nrf51/power.c

@@ -3,11 +3,11 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#include <zephyr.h>
-#include <pm/pm.h>
+#include <zephyr/zephyr.h>
+#include <zephyr/pm/pm.h>
 #include <hal/nrf_power.h>
 
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
 
 /* Invoke Low Power/System Off specific Tasks */

soc/arm/nordic_nrf/nrf51/soc.c

@@ -13,11 +13,11 @@
  * for the Nordic Semiconductor nRF51 family processor.
  */
 
-#include <kernel.h>
-#include <init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/init.h>
 #include <hal/nrf_power.h>
 #include <soc/nrfx_coredep.h>
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 
 #ifdef CONFIG_RUNTIME_NMI
 extern void z_arm_nmi_init(void);

soc/arm/nordic_nrf/nrf52/power.c

@@ -3,11 +3,11 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#include <zephyr.h>
-#include <pm/pm.h>
+#include <zephyr/zephyr.h>
+#include <zephyr/pm/pm.h>
 #include <hal/nrf_power.h>
 
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
 
 /* Invoke Low Power/System Off specific Tasks */

soc/arm/nordic_nrf/nrf52/soc.c

@@ -12,12 +12,12 @@
  * for the Nordic Semiconductor nRF52 family processor.
  */
 
-#include <kernel.h>
-#include <init.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/kernel.h>
+#include <zephyr/init.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 #include <hal/nrf_power.h>
 #include <soc/nrfx_coredep.h>
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 
 #ifdef CONFIG_RUNTIME_NMI
 extern void z_arm_nmi_init(void);

soc/arm/nordic_nrf/nrf53/power.c

@@ -4,12 +4,12 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#include <zephyr.h>
-#include <pm/pm.h>
+#include <zephyr/zephyr.h>
+#include <zephyr/pm/pm.h>
 
 #include <hal/nrf_regulators.h>
 
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
 
 /* Invoke Low Power/System Off specific Tasks */

soc/arm/nordic_nrf/nrf53/soc.c

@@ -12,15 +12,15 @@
  * for the Nordic Semiconductor nRF53 family processor.
  */
 
-#include <kernel.h>
-#include <init.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/kernel.h>
+#include <zephyr/init.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 #include <soc/nrfx_coredep.h>
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 #include <nrf_erratas.h>
 #if defined(CONFIG_SOC_NRF5340_CPUAPP)
-#include <drivers/gpio.h>
-#include <devicetree.h>
+#include <zephyr/drivers/gpio.h>
+#include <zephyr/devicetree.h>
 #include <hal/nrf_cache.h>
 #include <hal/nrf_gpio.h>
 #include <hal/nrf_oscillators.h>

soc/arm/nordic_nrf/nrf53/sync_rtc.c

@@ -6,11 +6,11 @@
 #include <nrfx_dppi.h>
 #include <hal/nrf_ipc.h>
 #include <helpers/nrfx_gppi.h>
-#include <drivers/timer/nrf_rtc_timer.h>
-#include <drivers/ipm.h>
-#include <drivers/mbox.h>
-#include <logging/log_ctrl.h>
-#include <logging/log.h>
+#include <zephyr/drivers/timer/nrf_rtc_timer.h>
+#include <zephyr/drivers/ipm.h>
+#include <zephyr/drivers/mbox.h>
+#include <zephyr/logging/log_ctrl.h>
+#include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(sync_rtc, CONFIG_SYNC_RTC_LOG_LEVEL);
 
 /* Arbitrary delay is used needed to handle cases when offset between cores is

soc/arm/nordic_nrf/nrf91/power.c

@@ -4,11 +4,11 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
-#include <zephyr.h>
-#include <pm/pm.h>
+#include <zephyr/zephyr.h>
+#include <zephyr/pm/pm.h>
 #include <hal/nrf_regulators.h>
 
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
 
 /* Invoke Low Power/System Off specific Tasks */

soc/arm/nordic_nrf/nrf91/soc.c

@@ -12,11 +12,11 @@
  * for the Nordic Semiconductor nRF91 family processor.
  */
 
-#include <kernel.h>
-#include <init.h>
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/kernel.h>
+#include <zephyr/init.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
 #include <soc/nrfx_coredep.h>
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 
 #ifdef CONFIG_RUNTIME_NMI
 extern void z_arm_nmi_init(void);

soc/arm/nordic_nrf/timing.c

@@ -4,10 +4,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <arch/arm/aarch32/arch.h>
-#include <kernel.h>
-#include <sys_clock.h>
-#include <timing/timing.h>
+#include <zephyr/arch/arm/aarch32/arch.h>
+#include <zephyr/kernel.h>
+#include <zephyr/sys_clock.h>
+#include <zephyr/timing/timing.h>
 #include <nrfx.h>
 
 #if defined(CONFIG_NRF_RTC_TIMER)

soc/arm/nordic_nrf/validate_base_addresses.c

@@ -4,9 +4,9 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <kernel.h>
+#include <zephyr/kernel.h>
 #include <soc.h>
-#include <devicetree.h>
+#include <zephyr/devicetree.h>
 
 /*
  * Account for MDK inconsistencies

soc/arm/nordic_nrf/validate_enabled_instances.c

@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <kernel.h>
+#include <zephyr/kernel.h>
 
 #define I2C_ENABLED(idx)  (IS_ENABLED(CONFIG_I2C) && \
 			   DT_NODE_HAS_STATUS(DT_NODELABEL(i2c##idx), okay))

soc/arm/nuvoton_npcx/common/power.c

@@ -45,16 +45,16 @@
  * INCLUDE FILES: soc_clock.h
  */
 
-#include <arch/arm/aarch32/cortex_m/cmsis.h>
-#include <zephyr.h>
-#include <drivers/espi.h>
-#include <pm/pm.h>
+#include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
+#include <zephyr/zephyr.h>
+#include <zephyr/drivers/espi.h>
+#include <zephyr/pm/pm.h>
 #include <soc.h>
 
 #include "soc_host.h"
 #include "soc_power.h"
 
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
 
 /* The steps that npcx ec enters sleep/deep mode and leaves it. */

soc/arm/nuvoton_npcx/common/reg/reg_def.h

@@ -9,10 +9,10 @@
 
 #include <stdint.h>
 
-#include <devicetree.h>
-#include <sys/__assert.h>
-#include <sys/util_macro.h>
-#include <toolchain.h>
+#include <zephyr/devicetree.h>
+#include <zephyr/sys/__assert.h>
+#include <zephyr/sys/util_macro.h>
+#include <zephyr/toolchain.h>
 
 /*
  * NPCX register structure size/offset checking macro function to mitigate

soc/arm/nuvoton_npcx/common/registers.c

@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
+#include <zephyr/device.h>
 #include <soc.h>
 
 /* CDCG register structure check */

soc/arm/nuvoton_npcx/common/scfg.c

@@ -4,15 +4,15 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <device.h>
-#include <drivers/gpio.h>
-#include <dt-bindings/pinctrl/npcx-pinctrl.h>
-#include <kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/drivers/gpio.h>
+#include <zephyr/dt-bindings/pinctrl/npcx-pinctrl.h>
+#include <zephyr/kernel.h>
 #include <soc.h>
 
 #include "soc_gpio.h"
 
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(pimux_npcx, LOG_LEVEL_ERR);
 
 /* Driver config */

soc/arm/nuvoton_npcx/common/soc_clock.h

@@ -10,7 +10,7 @@
 #include <stdbool.h>
 #include <stdint.h>
 
-#include <devicetree.h>
+#include <zephyr/devicetree.h>
 
 #ifdef __cplusplus
 extern "C" {

soc/arm/nuvoton_npcx/common/soc_dt.h

@@ -7,9 +7,9 @@
 #ifndef _NUVOTON_NPCX_SOC_DT_H_
 #define _NUVOTON_NPCX_SOC_DT_H_
 
-#include <devicetree.h>
-#include <irq.h>
-#include <sys/util_macro.h>
+#include <zephyr/devicetree.h>
+#include <zephyr/irq.h>
+#include <zephyr/sys/util_macro.h>
 
 /**
  * @brief Like DT_PROP(), but expand parameters with

soc/arm/nuvoton_npcx/common/soc_espi.h

@@ -7,7 +7,7 @@
 #ifndef _NUVOTON_NPCX_SOC_ESPI_H_
 #define _NUVOTON_NPCX_SOC_ESPI_H_
 
-#include <device.h>
+#include <zephyr/device.h>
 
 #ifdef __cplusplus
 extern "C" {

soc/arm/nuvoton_npcx/common/soc_gpio.h

@@ -7,7 +7,7 @@
 #ifndef _NUVOTON_NPCX_SOC_GPIO_H_
 #define _NUVOTON_NPCX_SOC_GPIO_H_
 
-#include <device.h>
+#include <zephyr/device.h>
 
 #ifdef __cplusplus
 extern "C" {

soc/arm/nuvoton_npcx/common/soc_host.h

@@ -9,9 +9,9 @@
 
 #include <stdint.h>
 
-#include <device.h>
-#include <drivers/espi.h>
-#include <sys/slist.h>
+#include <zephyr/device.h>
+#include <zephyr/drivers/espi.h>
+#include <zephyr/sys/slist.h>
 
 #ifdef __cplusplus
 extern "C" {

soc/arm/nuvoton_npcx/common/soc_miwu.h

@@ -9,8 +9,8 @@
 
 #include <stdint.h>
 
-#include <device.h>
-#include <drivers/gpio.h>
+#include <zephyr/device.h>
+#include <zephyr/drivers/gpio.h>
 
 #ifdef __cplusplus
 extern "C" {

soc/arm/nuvoton_npcx/npcx7/soc.c

@@ -4,11 +4,11 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <kernel.h>
-#include <device.h>
-#include <init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 
 LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
 

soc/arm/nuvoton_npcx/npcx9/soc.c

@@ -4,11 +4,11 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-#include <kernel.h>
-#include <device.h>
-#include <init.h>
+#include <zephyr/kernel.h>
+#include <zephyr/device.h>
+#include <zephyr/init.h>
 #include <soc.h>
-#include <logging/log.h>
+#include <zephyr/logging/log.h>
 
 LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
 

soc/arm/nuvoton_numicro/m48x/soc.c

@@ -5,8 +5,8 @@
  * Author: Saravanan Sekar <saravanan@linumiz.com>
  */
 
-#include <init.h>
-#include <kernel.h>
+#include <zephyr/init.h>
+#include <zephyr/kernel.h>
 
 void z_arm_platform_init(void)
 {