diff --git a/arch/Kconfig b/arch/Kconfig index 4a4102a314..6b3faa5f67 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -520,7 +520,7 @@ config MPU_GAP_FILLING documentation for more information on how this option is used. -menuconfig FLOAT +menuconfig FPU bool "Floating point" depends on CPU_HAS_FPU depends on ARC || ARM || RISCV || X86 @@ -533,7 +533,7 @@ menuconfig FLOAT config FP_SHARING bool "Floating point register sharing" - depends on FLOAT + depends on FPU help This option allows multiple threads to use the floating point registers. diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 1bd5738c33..c853d2f5cd 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -211,7 +211,7 @@ config CODE_DENSITY config ARC_HAS_ACCL_REGS bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)" - default y if FLOAT + default y if FPU help Depending on the configuration, CPU can contain accumulator reg-pair (also referred to as r58:r59). These can also be used by gcc as GPR so diff --git a/arch/arc/core/thread.c b/arch/arc/core/thread.c index d2a042b85c..3dd17f81e8 100644 --- a/arch/arc/core/thread.c +++ b/arch/arc/core/thread.c @@ -274,7 +274,7 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, #endif -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) int arch_float_disable(struct k_thread *thread) { unsigned int key; @@ -307,4 +307,4 @@ int arch_float_enable(struct k_thread *thread) return 0; } -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ diff --git a/arch/arm/core/aarch32/Kconfig b/arch/arm/core/aarch32/Kconfig index fd7857a680..b996b7ec5f 100644 --- a/arch/arm/core/aarch32/Kconfig +++ b/arch/arm/core/aarch32/Kconfig @@ -214,7 +214,7 @@ config ARM_NONSECURE_FIRMWARE choice prompt "Floating point ABI" default FP_HARDABI - depends on FLOAT + depends on FPU config FP_HARDABI bool "Floating point Hard ABI" diff --git a/arch/arm/core/aarch32/cortex_a_r/reset.S b/arch/arm/core/aarch32/cortex_a_r/reset.S index 1e2c213c32..cbd0e20ae3 100644 --- a/arch/arm/core/aarch32/cortex_a_r/reset.S +++ b/arch/arm/core/aarch32/cortex_a_r/reset.S @@ -111,7 +111,7 @@ SECTION_SUBSEC_FUNC(TEXT, _reset_section, __start) mov r13, #0 /* r13_sys */ mov r14, #0 /* r14_sys */ -#if defined(CONFIG_FLOAT) +#if defined(CONFIG_FPU) /* * Initialise FPU registers to a defined state. */ @@ -142,7 +142,7 @@ SECTION_SUBSEC_FUNC(TEXT, _reset_section, __start) fmdrr d13, r1, r1 fmdrr d14, r1, r1 fmdrr d15, r1, r1 -#endif /* CONFIG_FLOAT */ +#endif /* CONFIG_FPU */ #endif /* CONFIG_CPU_HAS_DCLS */ diff --git a/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c b/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c index 119113b4b0..982a04d6f2 100644 --- a/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c +++ b/arch/arm/core/aarch32/cortex_m/mpu/arm_core_mpu.c @@ -215,7 +215,7 @@ void z_arm_configure_dynamic_mpu_regions(struct k_thread *thread) u32_t guard_start; u32_t guard_size = MPU_GUARD_ALIGN_AND_SIZE; -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) if ((thread->base.user_options & K_FP_REGS) != 0) { guard_size = MPU_GUARD_ALIGN_AND_SIZE_FLOAT; } diff --git a/arch/arm/core/aarch32/fatal.c b/arch/arm/core/aarch32/fatal.c index dde9efe6f6..bd825b8abc 100644 --- a/arch/arm/core/aarch32/fatal.c +++ b/arch/arm/core/aarch32/fatal.c @@ -23,7 +23,7 @@ static void esf_dump(const z_arch_esf_t *esf) LOG_ERR("r3/a4: 0x%08x r12/ip: 0x%08x r14/lr: 0x%08x", esf->basic.a4, esf->basic.ip, esf->basic.lr); LOG_ERR(" xpsr: 0x%08x", esf->basic.xpsr); -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) for (int i = 0; i < 16; i += 4) { LOG_ERR("s[%2d]: 0x%08x s[%2d]: 0x%08x" " s[%2d]: 0x%08x s[%2d]: 0x%08x", diff --git a/arch/arm/core/aarch32/prep_c.c b/arch/arm/core/aarch32/prep_c.c index eeef525e6c..707958378c 100644 --- a/arch/arm/core/aarch32/prep_c.c +++ b/arch/arm/core/aarch32/prep_c.c @@ -86,7 +86,7 @@ static inline void z_arm_floating_point_init(void) */ SCB->CPACR &= (~(CPACR_CP10_Msk | CPACR_CP11_Msk)); -#if defined(CONFIG_FLOAT) +#if defined(CONFIG_FPU) /* * Enable CP10 and CP11 Co-Processors to enable access to floating * point registers. @@ -143,7 +143,7 @@ static inline void z_arm_floating_point_init(void) * of floating point instructions. */ -#endif /* CONFIG_FLOAT */ +#endif /* CONFIG_FPU */ /* * Upon reset, the CONTROL.FPCA bit is, normally, cleared. However, @@ -154,7 +154,7 @@ static inline void z_arm_floating_point_init(void) * In Sharing FP Registers mode CONTROL.FPCA is cleared before switching * to main, so it may be skipped here (saving few boot cycles). */ -#if !defined(CONFIG_FLOAT) || !defined(CONFIG_FP_SHARING) +#if !defined(CONFIG_FPU) || !defined(CONFIG_FP_SHARING) __set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk))); #endif } diff --git a/arch/arm/core/aarch32/thread.c b/arch/arm/core/aarch32/thread.c index f329f91c7d..6bef6d9d3c 100644 --- a/arch/arm/core/aarch32/thread.c +++ b/arch/arm/core/aarch32/thread.c @@ -71,7 +71,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, stackSize -= MPU_GUARD_ALIGN_AND_SIZE; #endif -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) \ +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) \ && defined(CONFIG_MPU_STACK_GUARD) /* For a thread which intends to use the FP services, it is required to * allocate a wider MPU guard region, to always successfully detect an @@ -166,13 +166,13 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry, * privileged stack. Adjust the available (writable) stack * buffer area accordingly. */ -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) _current->arch.priv_stack_start += (_current->base.user_options & K_FP_REGS) ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; #else _current->arch.priv_stack_start += MPU_GUARD_ALIGN_AND_SIZE; -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ #endif /* CONFIG_MPU_STACK_GUARD */ z_arm_userspace_enter(user_entry, p1, p2, p3, @@ -285,12 +285,12 @@ u32_t z_check_thread_stack_fail(const u32_t fault_addr, const u32_t psp) return 0; } -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) u32_t guard_len = (thread->base.user_options & K_FP_REGS) ? MPU_GUARD_ALIGN_AND_SIZE_FLOAT : MPU_GUARD_ALIGN_AND_SIZE; #else u32_t guard_len = MPU_GUARD_ALIGN_AND_SIZE; -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ #if defined(CONFIG_USERSPACE) if (thread->arch.priv_stack_start) { @@ -333,7 +333,7 @@ u32_t z_check_thread_stack_fail(const u32_t fault_addr, const u32_t psp) } #endif /* CONFIG_MPU_STACK_GUARD || CONFIG_USERSPACE */ -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) int arch_float_disable(struct k_thread *thread) { if (thread != _current) { @@ -365,14 +365,14 @@ int arch_float_disable(struct k_thread *thread) return 0; } -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ void arch_switch_to_main_thread(struct k_thread *main_thread, k_thread_stack_t *main_stack, size_t main_stack_size, k_thread_entry_t _main) { -#if defined(CONFIG_FLOAT) +#if defined(CONFIG_FPU) /* Initialize the Floating Point Status and Control Register when in * Unshared FP Registers mode (In Shared FP Registers mode, FPSCR is * initialized at thread creation for threads that make use of the FP). @@ -383,7 +383,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, __set_CONTROL(__get_CONTROL() & (~(CONTROL_FPCA_Msk))); __ISB(); #endif /* CONFIG_FP_SHARING */ -#endif /* CONFIG_FLOAT */ +#endif /* CONFIG_FPU */ #ifdef CONFIG_ARM_MPU /* Configure static memory map. This will program MPU regions, diff --git a/arch/arm/core/offsets/offsets_aarch32.c b/arch/arm/core/offsets/offsets_aarch32.c index be07522c88..3f78d12042 100644 --- a/arch/arm/core/offsets/offsets_aarch32.c +++ b/arch/arm/core/offsets/offsets_aarch32.c @@ -36,7 +36,7 @@ GEN_OFFSET_SYM(_thread_arch_t, priv_stack_start); #endif #endif -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) GEN_OFFSET_SYM(_thread_arch_t, preempt_float); #endif @@ -49,7 +49,7 @@ GEN_OFFSET_SYM(_basic_sf_t, lr); GEN_OFFSET_SYM(_basic_sf_t, pc); GEN_OFFSET_SYM(_basic_sf_t, xpsr); -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) GEN_OFFSET_SYM(_esf_t, s); GEN_OFFSET_SYM(_esf_t, fpscr); #endif @@ -82,7 +82,7 @@ GEN_ABSOLUTE_SYM(___thread_stack_info_t_SIZEOF, * point registers. */ -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) GEN_ABSOLUTE_SYM(_K_THREAD_NO_FLOAT_SIZEOF, sizeof(struct k_thread) - sizeof(struct _preempt_float)); #else diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 32ebcf7d61..b7300cb31c 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -16,7 +16,7 @@ config COMPRESSED_ISA config FLOAT_HARD bool "Enable hard-float calling convention" default y - depends on FLOAT + depends on FPU select COMPRESSED_ISA help This option enables the hard-float calling convention. diff --git a/arch/riscv/core/isr.S b/arch/riscv/core/isr.S index d143a2a85d..14751a9bc5 100644 --- a/arch/riscv/core/isr.S +++ b/arch/riscv/core/isr.S @@ -144,7 +144,7 @@ SECTION_FUNC(exception.entry, __irq_wrapper) RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp) RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp) -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* Assess whether floating-point registers need to be saved. */ la t0, _kernel RV_OP_LOADREG t0, _kernel_offset_to_current(t0) @@ -396,7 +396,7 @@ reschedule: RV_OP_STOREREG s10, _thread_offset_to_s10(t1) RV_OP_STOREREG s11, _thread_offset_to_s11(t1) -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* Assess whether floating-point registers need to be saved. */ RV_OP_LOADREG t2, _thread_offset_to_user_options(t1) andi t2, t2, K_FP_REGS @@ -440,7 +440,7 @@ skip_store_fp_callee_saved: RV_OP_LOADREG s10, _thread_offset_to_s10(t1) RV_OP_LOADREG s11, _thread_offset_to_s11(t1) -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* Determine if we need to restore floating-point registers. */ RV_OP_LOADREG t2, _thread_offset_to_user_options(t1) andi t2, t2, K_FP_REGS @@ -482,7 +482,7 @@ skip_load_fp_callee_saved: RV_OP_STOREREG a6, __z_arch_esf_t_a6_OFFSET(sp) RV_OP_STOREREG a7, __z_arch_esf_t_a7_OFFSET(sp) -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* Assess whether floating-point registers need to be saved. */ RV_OP_LOADREG t2, _thread_offset_to_user_options(sp) andi t2, t2, K_FP_REGS @@ -495,7 +495,7 @@ skip_store_fp_caller_saved_benchmark: call read_timer_end_of_swap -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* Determine if we need to restore floating-point registers. */ RV_OP_LOADREG t2, __z_arch_esf_t_fp_state_OFFSET(sp) beqz t2, skip_load_fp_caller_saved_benchmark @@ -542,7 +542,7 @@ no_reschedule: RV_OP_LOADREG t0, __z_arch_esf_t_mstatus_OFFSET(sp) csrw mstatus, t0 -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* * Determine if we need to restore floating-point registers. This needs * to happen before restoring integer registers to avoid stomping on diff --git a/arch/riscv/core/offsets/offsets.c b/arch/riscv/core/offsets/offsets.c index 11db7cd2ec..607854d754 100644 --- a/arch/riscv/core/offsets/offsets.c +++ b/arch/riscv/core/offsets/offsets.c @@ -43,7 +43,7 @@ GEN_OFFSET_SYM(_callee_saved_t, s9); GEN_OFFSET_SYM(_callee_saved_t, s10); GEN_OFFSET_SYM(_callee_saved_t, s11); -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) GEN_OFFSET_SYM(_callee_saved_t, fcsr); GEN_OFFSET_SYM(_callee_saved_t, fs0); GEN_OFFSET_SYM(_callee_saved_t, fs1); @@ -82,7 +82,7 @@ GEN_OFFSET_SYM(z_arch_esf_t, a7); GEN_OFFSET_SYM(z_arch_esf_t, mepc); GEN_OFFSET_SYM(z_arch_esf_t, mstatus); -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) GEN_OFFSET_SYM(z_arch_esf_t, fp_state); GEN_OFFSET_SYM(z_arch_esf_t, ft0); GEN_OFFSET_SYM(z_arch_esf_t, ft1); diff --git a/arch/riscv/core/reset.S b/arch/riscv/core/reset.S index bcf4904ca5..ff2e17c7ec 100644 --- a/arch/riscv/core/reset.S +++ b/arch/riscv/core/reset.S @@ -46,7 +46,7 @@ loop_slave_core: boot_master_core: -#ifdef CONFIG_FLOAT +#ifdef CONFIG_FPU /* * Enable floating-point. */ diff --git a/arch/riscv/core/thread.c b/arch/riscv/core/thread.c index 986d66c7b0..5f849ef380 100644 --- a/arch/riscv/core/thread.c +++ b/arch/riscv/core/thread.c @@ -57,7 +57,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, * thread stack. */ stack_init->mstatus = MSTATUS_DEF_RESTORE; -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) if ((thread->base.user_options & K_FP_REGS) != 0) { stack_init->mstatus |= MSTATUS_FS_INIT; } @@ -68,7 +68,7 @@ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, thread->callee_saved.sp = (ulong_t)stack_init; } -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) int arch_float_disable(struct k_thread *thread) { unsigned int key; @@ -131,4 +131,4 @@ int arch_float_enable(struct k_thread *thread) return 0; } -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ diff --git a/arch/riscv/include/offsets_short_arch.h b/arch/riscv/include/offsets_short_arch.h index 15d159abfa..c45e6ee166 100644 --- a/arch/riscv/include/offsets_short_arch.h +++ b/arch/riscv/include/offsets_short_arch.h @@ -59,7 +59,7 @@ #define _thread_offset_to_swap_return_value \ (___thread_t_arch_OFFSET + ___thread_arch_t_swap_return_value_OFFSET) -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) #define _thread_offset_to_fcsr \ (___thread_t_callee_saved_OFFSET + ___callee_saved_t_fcsr_OFFSET) @@ -100,7 +100,7 @@ #define _thread_offset_to_fs11 \ (___thread_t_callee_saved_OFFSET + ___callee_saved_t_fs11_OFFSET) -#endif /* defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) */ +#endif /* defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) */ /* end - threads */ diff --git a/arch/x86/core/Kconfig.ia32 b/arch/x86/core/Kconfig.ia32 index 3bb0f5e359..efcbeb6f3f 100644 --- a/arch/x86/core/Kconfig.ia32 +++ b/arch/x86/core/Kconfig.ia32 @@ -80,7 +80,7 @@ depends on CPU_HAS_FPU config SSE bool "SSE registers" - depends on FLOAT + depends on FPU help This option enables the use of SSE registers by threads. @@ -100,7 +100,7 @@ config SSE_FP_MATH config EAGER_FP_SHARING bool - depends on FLOAT + depends on FPU depends on USERSPACE default y if !X86_NO_LAZY_FP help @@ -110,12 +110,12 @@ config EAGER_FP_SHARING Mitigates CVE-2018-3665, but incurs a performance hit. For vulnerable systems that process sensitive information in the - FPU register set, should be used any time CONFIG_FLOAT is + FPU register set, should be used any time CONFIG_FPU is enabled, regardless if the FPU is used by one thread or multiple. config LAZY_FP_SHARING bool - depends on FLOAT + depends on FPU depends on !EAGER_FP_SHARING depends on FP_SHARING default y if X86_NO_LAZY_FP || !USERSPACE diff --git a/arch/x86/core/ia32/crt0.S b/arch/x86/core/ia32/crt0.S index c5fd73c698..6246cb772c 100644 --- a/arch/x86/core/ia32/crt0.S +++ b/arch/x86/core/ia32/crt0.S @@ -85,7 +85,7 @@ __csSet: #endif /* CONFIG_SET_GDT */ -#if !defined(CONFIG_FLOAT) +#if !defined(CONFIG_FPU) /* * Force an #NM exception for floating point instructions * since FP support hasn't been configured @@ -126,7 +126,7 @@ __csSet: #endif /* CONFIG_SSE */ -#endif /* !CONFIG_FLOAT */ +#endif /* !CONFIG_FPU */ /* * Set the stack pointer to the area used for the interrupt stack. diff --git a/arch/x86/core/ia32/thread.c b/arch/x86/core/ia32/thread.c index 0495ab4c97..72b619c43b 100644 --- a/arch/x86/core/ia32/thread.c +++ b/arch/x86/core/ia32/thread.c @@ -45,7 +45,7 @@ extern void z_x86_syscall_entry_stub(void); NANO_CPU_INT_REGISTER(z_x86_syscall_entry_stub, -1, -1, 0x80, 3); #endif /* CONFIG_X86_USERSPACE */ -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) extern int z_float_disable(struct k_thread *thread); @@ -57,7 +57,7 @@ int arch_float_disable(struct k_thread *thread) return -ENOSYS; #endif /* CONFIG_LAZY_FP_SHARING */ } -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ void arch_new_thread(struct k_thread *thread, k_thread_stack_t *stack, size_t stack_size, k_thread_entry_t entry, diff --git a/boards/arm/msp_exp432p401r_launchxl/msp_exp432p401r_launchxl_defconfig b/boards/arm/msp_exp432p401r_launchxl/msp_exp432p401r_launchxl_defconfig index 3e05551cba..83dec40039 100644 --- a/boards/arm/msp_exp432p401r_launchxl/msp_exp432p401r_launchxl_defconfig +++ b/boards/arm/msp_exp432p401r_launchxl/msp_exp432p401r_launchxl_defconfig @@ -6,7 +6,7 @@ CONFIG_SOC_MSP432P401R=y CONFIG_CORTEX_M_SYSTICK=y # Floating point options -CONFIG_FLOAT=y +CONFIG_FPU=y # enable uart driver CONFIG_SERIAL=y diff --git a/boards/arm/stm32373c_eval/stm32373c_eval_defconfig b/boards/arm/stm32373c_eval/stm32373c_eval_defconfig index d08dbf2e78..2774aecd5f 100644 --- a/boards/arm/stm32373c_eval/stm32373c_eval_defconfig +++ b/boards/arm/stm32373c_eval/stm32373c_eval_defconfig @@ -7,7 +7,7 @@ CONFIG_SOC_SERIES_STM32F3X=y CONFIG_SOC_STM32F373XC=y # Floating Point Options -CONFIG_FLOAT=y +CONFIG_FPU=y # General Kernel Options CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 diff --git a/boards/arm/stm32f3_disco/stm32f3_disco_defconfig b/boards/arm/stm32f3_disco/stm32f3_disco_defconfig index 4431b08667..ce469b5ea0 100644 --- a/boards/arm/stm32f3_disco/stm32f3_disco_defconfig +++ b/boards/arm/stm32f3_disco/stm32f3_disco_defconfig @@ -6,7 +6,7 @@ CONFIG_SOC_STM32F303XC=y CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 # Floating Point Options -CONFIG_FLOAT=y +CONFIG_FPU=y # enable uart driver CONFIG_SERIAL=y diff --git a/cmake/compiler/gcc/target_arm.cmake b/cmake/compiler/gcc/target_arm.cmake index f0b901092b..93444482a3 100644 --- a/cmake/compiler/gcc/target_arm.cmake +++ b/cmake/compiler/gcc/target_arm.cmake @@ -29,7 +29,7 @@ else() set(FPU_FOR_cortex-m7 fpv5-${PRECISION_TOKEN}d16) set(FPU_FOR_cortex-m33 fpv5-${PRECISION_TOKEN}d16) - if(CONFIG_FLOAT) + if(CONFIG_FPU) list(APPEND TOOLCHAIN_C_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}}) list(APPEND TOOLCHAIN_LD_FLAGS -mfpu=${FPU_FOR_${GCC_M_CPU}}) if (CONFIG_FP_SOFTABI) diff --git a/cmake/compiler/gcc/target_riscv.cmake b/cmake/compiler/gcc/target_riscv.cmake index 7d758a9866..88c7a901f3 100644 --- a/cmake/compiler/gcc/target_riscv.cmake +++ b/cmake/compiler/gcc/target_riscv.cmake @@ -12,7 +12,7 @@ else() string(CONCAT riscv_march ${riscv_march} "32ima") endif() -if(CONFIG_FLOAT) +if(CONFIG_FPU) if(CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION) if(CONFIG_FLOAT_HARD) string(CONCAT riscv_mabi ${riscv_mabi} "d") diff --git a/doc/guides/kconfig/setting.rst b/doc/guides/kconfig/setting.rst index d99dffb563..bbc327f46b 100644 --- a/doc/guides/kconfig/setting.rst +++ b/doc/guides/kconfig/setting.rst @@ -30,7 +30,7 @@ between *visible* and *invisible* symbols. .. code-block:: none - config FLOAT + config FPU bool "Support floating point operations" depends on HAS_FPU @@ -75,12 +75,12 @@ Assignments in configuration files use this syntax: There should be no spaces around the equals sign. ``bool`` symbols can be enabled or disabled by setting them to ``y`` or ``n``, -respectively. The ``FLOAT`` symbol from the example above could be enabled like +respectively. The ``FPU`` symbol from the example above could be enabled like this: .. code-block:: none - CONFIG_FLOAT=y + CONFIG_FPU=y .. note:: diff --git a/doc/guides/kconfig/tips.rst b/doc/guides/kconfig/tips.rst index ed29f34d2a..740f7ab8c7 100644 --- a/doc/guides/kconfig/tips.rst +++ b/doc/guides/kconfig/tips.rst @@ -229,7 +229,7 @@ way, without having to look for particular architectures: .. code-block:: none - config FLOAT + config FPU bool "Support floating point operations" depends on CPU_HAS_FPU @@ -238,7 +238,7 @@ duplicated in several spots: .. code-block:: none - config FLOAT + config FPU bool "Support floating point operations" depends on SOC_FOO || SOC_BAR || ... diff --git a/doc/reference/kernel/other/float.rst b/doc/reference/kernel/other/float.rst index 52ee6aebcc..c692e93908 100644 --- a/doc/reference/kernel/other/float.rst +++ b/doc/reference/kernel/other/float.rst @@ -264,11 +264,11 @@ perform floating point operations. Configuration Options ********************* -To configure unshared FP registers mode, enable the :option:`CONFIG_FLOAT` +To configure unshared FP registers mode, enable the :option:`CONFIG_FPU` configuration option and leave the :option:`CONFIG_FP_SHARING` configuration option disabled. -To configure shared FP registers mode, enable both the :option:`CONFIG_FLOAT` +To configure shared FP registers mode, enable both the :option:`CONFIG_FPU` configuration option and the :option:`CONFIG_FP_SHARING` configuration option. Also, ensure that any thread that uses the floating point registers has sufficient added stack space for saving floating point register values diff --git a/doc/zephyr.doxyfile.in b/doc/zephyr.doxyfile.in index b6d129a483..21986537a4 100644 --- a/doc/zephyr.doxyfile.in +++ b/doc/zephyr.doxyfile.in @@ -1967,7 +1967,7 @@ PREDEFINED = "CONFIG_ARCH_HAS_CUSTOM_BUSY_WAIT" \ "CONFIG_ERRNO" \ "CONFIG_EXECUTION_BENCHMARKING" \ "CONFIG_FLASH_PAGE_LAYOUT" \ - "CONFIG_FLOAT" \ + "CONFIG_FPU" \ "CONFIG_FP_SHARING" \ "CONFIG_NET_L2_ETHERNET_MGMT" \ "CONFIG_NET_MGMT_EVENT" \ diff --git a/include/arch/arm/aarch32/arch.h b/include/arch/arm/aarch32/arch.h index 142932dc19..b0c095d351 100644 --- a/include/arch/arm/aarch32/arch.h +++ b/include/arch/arm/aarch32/arch.h @@ -129,7 +129,7 @@ extern "C" { * upon exception entry. Therefore, a wide guard region is required to * guarantee that stack-overflow detection will always be successful. */ -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) \ +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) \ && defined(CONFIG_MPU_STACK_GUARD) #define MPU_GUARD_ALIGN_AND_SIZE_FLOAT CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT #else diff --git a/include/arch/arm/aarch32/exc.h b/include/arch/arm/aarch32/exc.h index 54ec62b850..f9c8d0e7d9 100644 --- a/include/arch/arm/aarch32/exc.h +++ b/include/arch/arm/aarch32/exc.h @@ -84,7 +84,7 @@ struct __esf { sys_define_gpr_with_alias(pc, r15); u32_t xpsr; } basic; -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) float s[16]; u32_t fpscr; u32_t undefined; diff --git a/include/arch/arm/aarch32/thread.h b/include/arch/arm/aarch32/thread.h index 73a3fa6d07..d42c615684 100644 --- a/include/arch/arm/aarch32/thread.h +++ b/include/arch/arm/aarch32/thread.h @@ -36,7 +36,7 @@ struct _callee_saved { typedef struct _callee_saved _callee_saved_t; -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) struct _preempt_float { float s16; float s17; @@ -65,7 +65,7 @@ struct _thread_arch { /* r0 in stack frame cannot be written to reliably */ u32_t swap_return_value; -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* * No cooperative floating point register set structure exists for * the Cortex-M as it automatically saves the necessary registers diff --git a/include/arch/riscv/exp.h b/include/arch/riscv/exp.h index 03c7e7b421..0b4c97ce14 100644 --- a/include/arch/riscv/exp.h +++ b/include/arch/riscv/exp.h @@ -41,7 +41,7 @@ struct soc_esf { }; #endif -#if !defined(RV_FP_TYPE) && defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if !defined(RV_FP_TYPE) && defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) #ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION #define RV_FP_TYPE u64_t #else @@ -74,7 +74,7 @@ struct __esf { ulong_t mepc; /* machine exception program counter */ ulong_t mstatus; /* machine status register */ -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) ulong_t fp_state; /* Floating-point saved context state. */ RV_FP_TYPE ft0; /* Caller-saved temporary floating register */ RV_FP_TYPE ft1; /* Caller-saved temporary floating register */ diff --git a/include/arch/riscv/thread.h b/include/arch/riscv/thread.h index 7068e28fb2..70a697546f 100644 --- a/include/arch/riscv/thread.h +++ b/include/arch/riscv/thread.h @@ -22,7 +22,7 @@ #ifndef _ASMLANGUAGE #include -#if !defined(RV_FP_TYPE) && defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if !defined(RV_FP_TYPE) && defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) #ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION #define RV_FP_TYPE u64_t #else @@ -50,7 +50,7 @@ struct _callee_saved { ulong_t s10; /* saved register */ ulong_t s11; /* saved register */ -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) u32_t fcsr; /* Control and status register */ RV_FP_TYPE fs0; /* saved floating-point register */ RV_FP_TYPE fs1; /* saved floating-point register */ diff --git a/kernel/include/kernel_arch_interface.h b/kernel/include/kernel_arch_interface.h index 0f37093316..d0084f14f7 100644 --- a/kernel/include/kernel_arch_interface.h +++ b/kernel/include/kernel_arch_interface.h @@ -165,7 +165,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, k_thread_entry_t _main); #endif /* CONFIG_ARCH_HAS_CUSTOM_SWAP_TO_MAIN */ -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /** * @brief Disable floating point context preservation * @@ -179,7 +179,7 @@ void arch_switch_to_main_thread(struct k_thread *main_thread, * @retval -EINVAL If the floating point disabling could not be performed. */ int arch_float_disable(struct k_thread *thread); -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ /** @} */ diff --git a/kernel/thread.c b/kernel/thread.c index b79d7d3c1d..cafe026813 100644 --- a/kernel/thread.c +++ b/kernel/thread.c @@ -805,11 +805,11 @@ void z_spin_lock_set_owner(struct k_spinlock *l) int z_impl_k_float_disable(struct k_thread *thread) { -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) return arch_float_disable(thread); #else return -ENOSYS; -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ } #ifdef CONFIG_USERSPACE diff --git a/samples/basic/minimal/common.conf b/samples/basic/minimal/common.conf index 73ce916600..6d8cdf4bfc 100644 --- a/samples/basic/minimal/common.conf +++ b/samples/basic/minimal/common.conf @@ -17,7 +17,7 @@ CONFIG_IRQ_OFFLOAD=n # Memory protection CONFIG_THREAD_STACK_INFO=n CONFIG_THREAD_CUSTOM_DATA=n -CONFIG_FLOAT=n +CONFIG_FPU=n # Boot CONFIG_BOOT_BANNER=n diff --git a/soc/arc/snps_arc_hsdk/CMakeLists.txt b/soc/arc/snps_arc_hsdk/CMakeLists.txt index eb9eb660dd..e5388c8e9f 100644 --- a/soc/arc/snps_arc_hsdk/CMakeLists.txt +++ b/soc/arc/snps_arc_hsdk/CMakeLists.txt @@ -6,7 +6,7 @@ zephyr_library_include_directories(${ZEPHYR_BASE}/drivers) # -mswap -mnorm -mll64 -mmpy-option=9 -mfpu=fpud_all zephyr_cc_option(-mcpu=${GCC_M_CPU}) zephyr_cc_option(-mno-sdata) -zephyr_cc_option_ifdef(CONFIG_FLOAT -mfpu=fpud_all) +zephyr_cc_option_ifdef(CONFIG_FPU -mfpu=fpud_all) zephyr_sources( soc.c diff --git a/soc/arc/snps_arc_iot/CMakeLists.txt b/soc/arc/snps_arc_iot/CMakeLists.txt index 1a8a6eae1e..4c478bc785 100644 --- a/soc/arc/snps_arc_iot/CMakeLists.txt +++ b/soc/arc/snps_arc_iot/CMakeLists.txt @@ -1,6 +1,6 @@ # SPDX-License-Identifier: Apache-2.0 zephyr_compile_options(-mcpu=${GCC_M_CPU} -mno-sdata -mmpy-option=6) -zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpuda_all) +zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpuda_all) zephyr_sources( soc.c diff --git a/soc/arc/snps_emsdp/CMakeLists.txt b/soc/arc/snps_emsdp/CMakeLists.txt index 5d12bf9fa9..7a4ba9674f 100644 --- a/soc/arc/snps_emsdp/CMakeLists.txt +++ b/soc/arc/snps_emsdp/CMakeLists.txt @@ -13,9 +13,8 @@ elseif(CONFIG_SOC_EMSDP_EM7D_ESP) zephyr_compile_options(-mmpy-option=6) elseif(CONFIG_SOC_EMSDP_EM9D) zephyr_compile_options(-mmpy-option=6) - zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpus_all) + zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpus_all) elseif(CONFIG_SOC_EMSDP_EM11D) zephyr_compile_options(-mmpy-option=6) - zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpuda_all) + zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpuda_all) endif() - diff --git a/soc/arc/snps_emsk/CMakeLists.txt b/soc/arc/snps_emsk/CMakeLists.txt index 518691268d..33d1094bf1 100644 --- a/soc/arc/snps_emsk/CMakeLists.txt +++ b/soc/arc/snps_emsk/CMakeLists.txt @@ -2,9 +2,9 @@ zephyr_compile_options(-mcpu=${GCC_M_CPU} -mno-sdata -mmpy-option=6) if(CONFIG_SOC_EMSK_EM9D) -zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpus_all) +zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpus_all) elseif(CONFIG_SOC_EMSK_EM11D) -zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpuda_all) +zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpuda_all) endif() zephyr_sources( diff --git a/soc/arc/snps_nsim/CMakeLists.txt b/soc/arc/snps_nsim/CMakeLists.txt index 198e3b0080..c3022090b9 100644 --- a/soc/arc/snps_nsim/CMakeLists.txt +++ b/soc/arc/snps_nsim/CMakeLists.txt @@ -3,9 +3,9 @@ zephyr_compile_options(-mcpu=${GCC_M_CPU} -mno-sdata) zephyr_compile_options_ifdef(CONFIG_CPU_ARCEM -mmpy-option=wlh1) zephyr_compile_options_ifdef(CONFIG_CPU_ARCHS -mmpy-option=plus_qmacw) if(CONFIG_CPU_ARCHS) -zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpud_all) +zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpud_all) else() -zephyr_compile_options_ifdef(CONFIG_FLOAT -mfpu=fpuda_all) +zephyr_compile_options_ifdef(CONFIG_FPU -mfpu=fpuda_all) endif() zephyr_sources( diff --git a/soc/arm/nxp_imx/mcimx6x_m4/Kconfig.defconfig.mcimx6x_m4 b/soc/arm/nxp_imx/mcimx6x_m4/Kconfig.defconfig.mcimx6x_m4 index aaf025a892..6f34bdb12a 100644 --- a/soc/arm/nxp_imx/mcimx6x_m4/Kconfig.defconfig.mcimx6x_m4 +++ b/soc/arm/nxp_imx/mcimx6x_m4/Kconfig.defconfig.mcimx6x_m4 @@ -8,7 +8,7 @@ if SOC_MCIMX6X_M4 config SOC default "mcimx6x" -config FLOAT +config FPU default y config GPIO_IMX diff --git a/subsys/debug/openocd.c b/subsys/debug/openocd.c index 55f241a33c..dec5a4008a 100644 --- a/subsys/debug/openocd.c +++ b/subsys/debug/openocd.c @@ -78,11 +78,11 @@ size_t _kernel_openocd_offsets[] = { [OPENOCD_OFFSET_T_NAME] = offsetof(struct k_thread, name), [OPENOCD_OFFSET_T_ARCH] = offsetof(struct k_thread, arch), -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) && defined(CONFIG_ARM) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) && defined(CONFIG_ARM) [OPENOCD_OFFSET_T_PREEMPT_FLOAT] = offsetof(struct _thread_arch, preempt_float), [OPENOCD_OFFSET_T_COOP_FLOAT] = OPENOCD_UNIMPLEMENTED, -#elif defined(CONFIG_FLOAT) && defined(CONFIG_X86) +#elif defined(CONFIG_FPU) && defined(CONFIG_X86) #if defined(CONFIG_X86_64) [OPENOCD_OFFSET_T_PREEMPT_FLOAT] = offsetof(struct _thread_arch, sse), #else diff --git a/subsys/net/ip/net_shell.c b/subsys/net/ip/net_shell.c index f832ffdadb..ca480e3b90 100644 --- a/subsys/net/ip/net_shell.c +++ b/subsys/net/ip/net_shell.c @@ -2895,7 +2895,7 @@ static enum net_verdict handle_ipv6_echo_reply(struct net_pkt *pkt, #ifdef CONFIG_IEEE802154 "rssi=%d " #endif -#ifdef CONFIG_FLOAT +#ifdef CONFIG_FPU "time=%.2f ms\n", #else "time=%d ms\n", @@ -2909,7 +2909,7 @@ static enum net_verdict handle_ipv6_echo_reply(struct net_pkt *pkt, #ifdef CONFIG_IEEE802154 net_pkt_ieee802154_rssi(pkt), #endif -#ifdef CONFIG_FLOAT +#ifdef CONFIG_FPU ((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000.f)); #else ((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000)); @@ -3022,7 +3022,7 @@ static enum net_verdict handle_ipv4_echo_reply(struct net_pkt *pkt, cycles = k_cycle_get_32() - cycles; PR_SHELL(shell_for_ping, "%d bytes from %s to %s: icmp_seq=%d ttl=%d " -#ifdef CONFIG_FLOAT +#ifdef CONFIG_FPU "time=%.2f ms\n", #else "time=%d ms\n", @@ -3033,7 +3033,7 @@ static enum net_verdict handle_ipv4_echo_reply(struct net_pkt *pkt, net_sprint_ipv4_addr(&ip_hdr->dst), ntohs(icmp_echo->sequence), ip_hdr->ttl, -#ifdef CONFIG_FLOAT +#ifdef CONFIG_FPU ((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000.f)); #else ((u32_t)k_cyc_to_ns_floor64(cycles) / 1000000)); diff --git a/tests/arch/arm/arm_thread_swap/src/arm_thread_arch.c b/tests/arch/arm/arm_thread_swap/src/arm_thread_arch.c index b4d0760b48..0e038a775d 100644 --- a/tests/arch/arm/arm_thread_swap/src/arm_thread_arch.c +++ b/tests/arch/arm/arm_thread_swap/src/arm_thread_arch.c @@ -110,7 +110,7 @@ static void verify_callee_saved(const _callee_saved_t *src, ); } -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* Arbitrary values for the floating-point callee-saved registers */ struct _preempt_float ztest_thread_fp_callee_saved_regs = { .s16 = 0x11111111, .s17 = 0x22222222, @@ -194,7 +194,7 @@ static void verify_fp_callee_saved(const struct _preempt_float *src, ); } -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ static void alt_thread_entry(void) { @@ -239,7 +239,7 @@ static void alt_thread_entry(void) memset(&ztest_thread_callee_saved_regs_container, 0, sizeof(_callee_saved_t)); -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* Verify that the _current_ (alt) thread is initialized with FPCA cleared. */ zassert_true((__get_CONTROL() & CONTROL_FPCA_Msk) == 0, @@ -268,7 +268,7 @@ static void alt_thread_entry(void) memset(&ztest_thread_fp_callee_saved_regs, 0, sizeof(ztest_thread_fp_callee_saved_regs)); -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ /* Modify the arch.basepri flag of the main test thread, to verify, * later, that this is passed properly to the BASEPRI. @@ -341,7 +341,7 @@ void test_arm_thread_swap(void) * Simulating initial conditions: * - set arbitrary values at the callee-saved registers * - set arbitrary values at the FP callee-saved registers, - * if building with CONFIG_FLOAT/CONFIG_FP_SHARING + * if building with CONFIG_FPU/CONFIG_FP_SHARING * - zero the thread's callee-saved data structure * - set thread's priority same as the alternative test thread */ @@ -389,7 +389,7 @@ void test_arm_thread_swap(void) _current->arch.mode); #endif /* CONFIG_USERSPACE */ -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* The main test thread is not (yet) actively using the FP registers */ zassert_true((_current->arch.mode & CONTROL_FPCA_Msk) == 0, "Thread FPCA flag not clear at initialization 0x%0x\n", @@ -422,7 +422,7 @@ void test_arm_thread_swap(void) */ zassert_true((_current->arch.mode & CONTROL_FPCA_Msk) == 0, "Thread FPCA flag not clear at initialization\n"); -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ /* Create an alternative (supervisor) testing thread */ k_thread_create(&alt_thread, @@ -611,7 +611,7 @@ void test_arm_thread_swap(void) _current->arch.swap_return_value, ztest_swap_return_val); #endif -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) /* Dump callee-saved registers to memory. */ __asm__ volatile ( "vstmia %0, {s16-s31};\n\t" @@ -632,7 +632,7 @@ void test_arm_thread_swap(void) zassert_true((__get_FPSCR() & 0x1) == 0x1, "FPSCR bit-0 not restored at swap: 0x%x\n", __get_FPSCR()); -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ } /** diff --git a/tests/arch/arm/arm_thread_swap/testcase.yaml b/tests/arch/arm/arm_thread_swap/testcase.yaml index 547dc1dc03..16f85e5985 100644 --- a/tests/arch/arm/arm_thread_swap/testcase.yaml +++ b/tests/arch/arm/arm_thread_swap/testcase.yaml @@ -15,14 +15,14 @@ tests: arch_whitelist: arm filter: CONFIG_ARMV7_M_ARMV8_M_FP extra_configs: - - CONFIG_FLOAT=y + - CONFIG_FPU=y - CONFIG_FP_SHARING=y tags: arm arch.arm.swap.common.fp_sharing.no_optimizations: arch_whitelist: arm filter: CONFIG_ARMV7_M_ARMV8_M_FP extra_configs: - - CONFIG_FLOAT=y + - CONFIG_FPU=y - CONFIG_FP_SHARING=y - CONFIG_NO_OPTIMIZATIONS=y - CONFIG_IDLE_STACK_SIZE=512 diff --git a/tests/benchmarks/app_kernel/prj_fp.conf b/tests/benchmarks/app_kernel/prj_fp.conf index a1ca04e620..c22f869124 100644 --- a/tests/benchmarks/app_kernel/prj_fp.conf +++ b/tests/benchmarks/app_kernel/prj_fp.conf @@ -3,7 +3,7 @@ CONFIG_TEST=y CONFIG_STDOUT_CONSOLE=y CONFIG_MAIN_THREAD_PRIORITY=6 -CONFIG_FLOAT=y +CONFIG_FPU=y CONFIG_SSE=y CONFIG_FP_SHARING=y CONFIG_SSE_FP_MATH=y diff --git a/tests/kernel/fatal/prj_arm_fp_sharing.conf b/tests/kernel/fatal/prj_arm_fp_sharing.conf index 1752b7a5bd..3e56752eec 100644 --- a/tests/kernel/fatal/prj_arm_fp_sharing.conf +++ b/tests/kernel/fatal/prj_arm_fp_sharing.conf @@ -1,4 +1,4 @@ -CONFIG_FLOAT=y +CONFIG_FPU=y CONFIG_FP_SHARING=y CONFIG_ZTEST=y CONFIG_COVERAGE=n diff --git a/tests/kernel/fatal/src/main.c b/tests/kernel/fatal/src/main.c index 46f310f58b..8349f9ceba 100644 --- a/tests/kernel/fatal/src/main.c +++ b/tests/kernel/fatal/src/main.c @@ -341,13 +341,13 @@ void test_fatal(void) TC_PRINT("test stack HW-based overflow - supervisor 2\n"); check_stack_overflow(stack_hw_overflow, 0); -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) TC_PRINT("test stack HW-based overflow (FPU thread) - supervisor 1\n"); check_stack_overflow(stack_hw_overflow, K_FP_REGS); TC_PRINT("test stack HW-based overflow (FPU thread) - supervisor 2\n"); check_stack_overflow(stack_hw_overflow, K_FP_REGS); -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ #endif /* CONFIG_HW_STACK_PROTECTION */ @@ -365,13 +365,13 @@ void test_fatal(void) TC_PRINT("test stack HW-based overflow - user priv stack 2\n"); check_stack_overflow(user_priv_stack_hw_overflow, K_USER); -#if defined(CONFIG_FLOAT) && defined(CONFIG_FP_SHARING) +#if defined(CONFIG_FPU) && defined(CONFIG_FP_SHARING) TC_PRINT("test stack HW-based overflow (FPU thread) - user 1\n"); check_stack_overflow(stack_hw_overflow, K_USER | K_FP_REGS); TC_PRINT("test stack HW-based overflow (FPU thread) - user 2\n"); check_stack_overflow(stack_hw_overflow, K_USER | K_FP_REGS); -#endif /* CONFIG_FLOAT && CONFIG_FP_SHARING */ +#endif /* CONFIG_FPU && CONFIG_FP_SHARING */ #endif /* CONFIG_USERSPACE */ diff --git a/tests/kernel/fp_sharing/float_disable/prj.conf b/tests/kernel/fp_sharing/float_disable/prj.conf index a159922b46..1413e088cf 100644 --- a/tests/kernel/fp_sharing/float_disable/prj.conf +++ b/tests/kernel/fp_sharing/float_disable/prj.conf @@ -1,4 +1,4 @@ CONFIG_ZTEST=y CONFIG_TEST_USERSPACE=y -CONFIG_FLOAT=y +CONFIG_FPU=y CONFIG_FP_SHARING=y diff --git a/tests/kernel/fp_sharing/float_disable/prj_x86.conf b/tests/kernel/fp_sharing/float_disable/prj_x86.conf index e318808f86..f7e54768c3 100644 --- a/tests/kernel/fp_sharing/float_disable/prj_x86.conf +++ b/tests/kernel/fp_sharing/float_disable/prj_x86.conf @@ -1,6 +1,6 @@ CONFIG_ZTEST=y CONFIG_TEST_USERSPACE=y -CONFIG_FLOAT=y +CONFIG_FPU=y CONFIG_FP_SHARING=y CONFIG_SSE=y CONFIG_SSE_FP_MATH=y diff --git a/tests/kernel/fp_sharing/generic/prj.conf b/tests/kernel/fp_sharing/generic/prj.conf index 744d804419..eee634013a 100644 --- a/tests/kernel/fp_sharing/generic/prj.conf +++ b/tests/kernel/fp_sharing/generic/prj.conf @@ -1,4 +1,4 @@ CONFIG_ZTEST=y -CONFIG_FLOAT=y +CONFIG_FPU=y CONFIG_FP_SHARING=y CONFIG_STDOUT_CONSOLE=y diff --git a/tests/kernel/fp_sharing/generic/prj_x86.conf b/tests/kernel/fp_sharing/generic/prj_x86.conf index 88c0111ae3..ea30a80ae3 100644 --- a/tests/kernel/fp_sharing/generic/prj_x86.conf +++ b/tests/kernel/fp_sharing/generic/prj_x86.conf @@ -1,5 +1,5 @@ CONFIG_ZTEST=y -CONFIG_FLOAT=y +CONFIG_FPU=y CONFIG_SSE=y CONFIG_FP_SHARING=y CONFIG_SSE_FP_MATH=y diff --git a/tests/kernel/fp_sharing/generic/src/main.c b/tests/kernel/fp_sharing/generic/src/main.c index 9a969fb617..c74a088f1f 100644 --- a/tests/kernel/fp_sharing/generic/src/main.c +++ b/tests/kernel/fp_sharing/generic/src/main.c @@ -9,8 +9,8 @@ #include "test_common.h" -#ifndef CONFIG_FLOAT -#error Rebuild with the FLOAT config option enabled +#ifndef CONFIG_FPU +#error Rebuild with the FPU config option enabled #endif #ifndef CONFIG_FP_SHARING diff --git a/tests/lib/sprintf/prj.conf b/tests/lib/sprintf/prj.conf index 2bd9d6137b..b93a5675d9 100644 --- a/tests/lib/sprintf/prj.conf +++ b/tests/lib/sprintf/prj.conf @@ -1,2 +1,2 @@ CONFIG_ZTEST=y -CONFIG_FLOAT=y +CONFIG_FPU=y diff --git a/tests/lib/sprintf/src/main.c b/tests/lib/sprintf/src/main.c index 5660d8b252..3338e46d40 100644 --- a/tests/lib/sprintf/src/main.c +++ b/tests/lib/sprintf/src/main.c @@ -64,7 +64,7 @@ void test_sprintf_double(void) char buffer[400]; union raw_double_u var; -#ifndef CONFIG_FLOAT +#ifndef CONFIG_FPU ztest_test_skip(); return; #endif