drivers: clock_control: Add support for MCUX CCM IUART clock

Add support for controlling the MCUX CCM IUART clock.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
This commit is contained in:
Manivannan Sadhasivam 2019-07-27 12:17:33 +05:30 committed by Maureen Helm
parent 0533d4eae1
commit 1118428abb
2 changed files with 16 additions and 1 deletions

View file

@ -15,12 +15,14 @@
#include <logging/log.h>
LOG_MODULE_REGISTER(clock_control);
#ifdef CONFIG_SPI_MCUX_LPSPI
static const clock_name_t lpspi_clocks[] = {
kCLOCK_Usb1PllPfd1Clk,
kCLOCK_Usb1PllPfd0Clk,
kCLOCK_SysPllClk,
kCLOCK_SysPllPfd2Clk,
};
#endif
static int mcux_ccm_on(struct device *dev,
clock_control_subsys_t sub_system)
@ -55,6 +57,7 @@ static int mcux_ccm_get_subsys_rate(struct device *dev,
break;
#endif
#ifdef CONFIG_SPI_MCUX_LPSPI
case IMX_CCM_LPSPI_CLK:
{
uint32_t lpspi_mux = CLOCK_GetMux(kCLOCK_LpspiMux);
@ -64,7 +67,9 @@ static int mcux_ccm_get_subsys_rate(struct device *dev,
/ (CLOCK_GetDiv(kCLOCK_LpspiDiv) + 1);
break;
}
#endif
#ifdef CONFIG_UART_MCUX_LPUART
case IMX_CCM_LPUART_CLK:
if (CLOCK_GetMux(kCLOCK_UartMux) == 0) {
*rate = CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6
@ -75,6 +80,7 @@ static int mcux_ccm_get_subsys_rate(struct device *dev,
}
break;
#endif
#ifdef CONFIG_DISK_ACCESS_USDHC1
case IMX_CCM_USDHC1_CLK:
@ -95,6 +101,15 @@ static int mcux_ccm_get_subsys_rate(struct device *dev,
*rate = CLOCK_GetIpgFreq();
break;
#endif
#ifdef CONFIG_UART_MCUX_IUART
case IMX_CCM_UART_CLK:
*rate = CLOCK_GetPllFreq(kCLOCK_SystemPll1Ctrl) /
(CLOCK_GetRootPreDivider(kCLOCK_RootUart4)) /
(CLOCK_GetRootPostDivider(kCLOCK_RootUart4)) /
10;
break;
#endif
}
return 0;

View file

@ -16,6 +16,6 @@
#define IMX_CCM_USDHC1_CLK 6
#define IMX_CCM_USDHC2_CLK 7
#define IMX_CCM_EDMA_CLK 8
#define IMX_CCM_UART_CLK 9
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_IMX_CCM_H_ */