drivers: pwm: nrf: Migrate SW PWM Kconfig options to DT

1. Kconfig option Clock prescaler removed.
2. Modified pwm_nrf5_sw.c driver to use DT
   defines instead of Kconfig, and also use new
   DT options (timer, ppi/gpiote, etc).
3. Cleanup some code.

Signed-off-by: Gaute Gamnes <gaute.gamnes@nordicsemi.no>
This commit is contained in:
Gaute Gamnes 2019-03-12 09:05:51 +01:00 committed by Carles Cufí
parent 88f099c3a1
commit 121a9e41b2
2 changed files with 23 additions and 36 deletions

View file

@ -24,23 +24,4 @@ config PWM_NRF5_SW_0_DEV_NAME
Specify the device name for the Nordic Semiconductor nRF5x series S/W
PWM driver.
config PWM_NRF5_SW_0_CLOCK_PRESCALER
int "Nordic Semiconductor nRF5x series S/W PWM Clock Prescaler"
default 0
range 0 9
help
Set the clock prescaler for the timer used for generating
the PWM output signals. Prescaler values correspond to the
following timer frequencies:
0: 16 MHz
1: 8 MHz
2: 4 MHz
3: 2 MHz
4: 1 MHz
5: 500 kHz
6: 250 kHz
7: 125 kHz
8: 62500 Hz
9: 31250 Hz
endif # PWM_NRF5_SW

View file

@ -7,11 +7,21 @@
#include <soc.h>
#include "pwm.h"
#include <nrf_peripherals.h>
#define LOG_LEVEL CONFIG_PWM_LOG_LEVEL
#include <logging/log.h>
LOG_MODULE_REGISTER(pwm_nrf5_sw);
/* One compare channel is needed to set the PWM period, hence +1. */
#if ((DT_NORDIC_NRF_SW_PWM_0_CHANNEL_COUNT + 1) > \
(_CONCAT( \
_CONCAT(TIMER, DT_NORDIC_NRF_SW_PWM_0_TIMER_INSTANCE), \
_CC_NUM)))
#error "Invalid number of PWM channels configured."
#endif
#define PWM_0_MAP_SIZE DT_NORDIC_NRF_SW_PWM_0_CHANNEL_COUNT
struct pwm_config {
NRF_TIMER_Type *timer;
u8_t gpiote_base;
@ -27,7 +37,7 @@ struct chan_map {
struct pwm_data {
u32_t period_cycles;
struct chan_map map[];
struct chan_map map[PWM_0_MAP_SIZE];
};
static u32_t pwm_period_check(struct pwm_data *data, u8_t map_size,
@ -234,7 +244,6 @@ static int pwm_nrf5_sw_init(struct device *dev)
return 0;
}
#define PWM_0_MAP_SIZE 3
/* NOTE: nRF51x BLE controller use HW tIFS hence using only PPI channels 1-6.
* nRF52x BLE controller implements SW tIFS and uses addition 6 PPI channels.
* Also, nRF52x requires one additional PPI channel for decryption rate boost.
@ -244,23 +253,20 @@ static int pwm_nrf5_sw_init(struct device *dev)
* channels 14-15 are used by BLE controller.
*/
static const struct pwm_config pwm_nrf5_sw_0_config = {
#if defined(CONFIG_SOC_SERIES_NRF51X)
.timer = NRF_TIMER1,
.ppi_base = 7,
#else
.timer = NRF_TIMER2,
.ppi_base = 14,
#endif
.gpiote_base = 0,
.timer = _CONCAT(NRF_TIMER, DT_NORDIC_NRF_SW_PWM_0_TIMER_INSTANCE),
.ppi_base = DT_NORDIC_NRF_SW_PWM_0_PPI_BASE,
.gpiote_base = DT_NORDIC_NRF_SW_PWM_0_GPIOTE_BASE,
.map_size = PWM_0_MAP_SIZE,
.prescaler = CONFIG_PWM_NRF5_SW_0_CLOCK_PRESCALER,
.prescaler = DT_NORDIC_NRF_SW_PWM_0_CLOCK_PRESCALER,
};
#define PWM_0_DATA_SIZE (offsetof(struct pwm_data, map) + \
sizeof(struct chan_map) * PWM_0_MAP_SIZE)
static u8_t pwm_nrf5_sw_0_data[PWM_0_DATA_SIZE];
static struct pwm_data pwm_nrf5_sw_0_data;
DEVICE_AND_API_INIT(pwm_nrf5_sw_0, CONFIG_PWM_NRF5_SW_0_DEV_NAME,
pwm_nrf5_sw_init, pwm_nrf5_sw_0_data, &pwm_nrf5_sw_0_config,
POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
DEVICE_AND_API_INIT(pwm_nrf5_sw_0,
CONFIG_PWM_NRF5_SW_0_DEV_NAME,
pwm_nrf5_sw_init,
&pwm_nrf5_sw_0_data,
&pwm_nrf5_sw_0_config,
POST_KERNEL,
CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
&pwm_nrf5_sw_drv_api_funcs);