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dts: mpfs_icicle: remove incorrect compatible from cpus

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remove the microsemi vendor compatible from Microchip's PolarFire SoC
mpfs_icicle platform

Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
This commit is contained in:
Conor Paxton 2023-01-18 09:43:54 +00:00 committed by Carles Cufí
parent 978a0eba21
commit 1462751681
1 changed files with 5 additions and 5 deletions
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10
dts/riscv/mpfs-icicle.dtsi
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@ -16,7 +16,7 @@
#size-cells = <0>; #size-cells = <0>;
cpu@0 { cpu@0 {
clock-frequency = <0>; clock-frequency = <0>;
compatible = "microsemi,miv", "riscv"; compatible = "riscv";
device_type = "cpu"; device_type = "cpu";
reg = < 0x0 >; reg = < 0x0 >;
riscv,isa = "rv64imac"; riscv,isa = "rv64imac";
@ -30,7 +30,7 @@
cpu@1 { cpu@1 {
clock-frequency = <0>; clock-frequency = <0>;
compatible = "microsemi,miv", "riscv"; compatible = "riscv";
device_type = "cpu"; device_type = "cpu";
reg = < 0x1 >; reg = < 0x1 >;
riscv,isa = "rv64imafdc"; riscv,isa = "rv64imafdc";
@ -44,7 +44,7 @@
cpu@2 { cpu@2 {
clock-frequency = <0>; clock-frequency = <0>;
compatible = "microsemi,miv", "riscv"; compatible = "riscv";
device_type = "cpu"; device_type = "cpu";
reg = < 0x2 >; reg = < 0x2 >;
riscv,isa = "rv64imafdc"; riscv,isa = "rv64imafdc";
@ -58,7 +58,7 @@
cpu@3 { cpu@3 {
clock-frequency = <0>; clock-frequency = <0>;
compatible = "microsemi,miv", "riscv"; compatible = "riscv";
device_type = "cpu"; device_type = "cpu";
reg = < 0x3 >; reg = < 0x3 >;
riscv,isa = "rv64imafdc"; riscv,isa = "rv64imafdc";
@ -72,7 +72,7 @@
cpu@4 { cpu@4 {
clock-frequency = <0>; clock-frequency = <0>;
compatible = "microsemi,miv", "riscv"; compatible = "riscv";
device_type = "cpu"; device_type = "cpu";
reg = < 0x4 >; reg = < 0x4 >;
riscv,isa = "rv64imafdc"; riscv,isa = "rv64imafdc";