tests: devicetree: api: add tests for new DT APIs
Add tests for new DT APIs added in the previous commit: - `DT_IRQN_BY_IDX` - `DT_INST_IRQN_BY_IDX` Added additional tests for the following existing DT APIs when `CONFIG_MULTI_LEVEL_INTERRUPTS` is enabled: - `DT_IRQN` - `DT_INST_IRQN` Added `qemu_riscv32` for the multi-level interrupt tests. Signed-off-by: Yong Cong Sin <ycsin@meta.com>
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@ -415,6 +415,7 @@
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reg = <0xbbbbcccc 0x1000>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <11 0>;
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};
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/* there should only be one of these */
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@ -422,6 +423,7 @@
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compatible = "vnd,interrupt-holder";
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status = "okay";
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interrupts = <30 3 40 5 60 7>;
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interrupt-parent = <&test_intc>;
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interrupt-names = "err", "stat", "done";
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};
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@ -707,6 +707,26 @@ ZTEST(devicetree_api, test_irq)
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/* DT_IRQN */
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zassert_equal(DT_IRQN(TEST_I2C_BUS), 6, "");
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#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
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zassert_equal(DT_IRQN(DT_INST(0, DT_DRV_COMPAT)), 30, "");
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#else
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zassert_equal(DT_IRQN(DT_INST(0, DT_DRV_COMPAT)),
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((30 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
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#endif
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/* DT_IRQN_BY_IDX */
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#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
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zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 0), 30, "");
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zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 1), 40, "");
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zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 2), 60, "");
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#else
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zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 0),
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((30 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
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zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 1),
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((40 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
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zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 2),
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((60 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
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#endif
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/* DT_INST */
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zassert_equal(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT), 1, "");
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@ -738,7 +758,25 @@ ZTEST(devicetree_api, test_irq)
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zassert_equal(DT_INST_IRQ(0, priority), 3, "");
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/* DT_INST_IRQN */
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#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
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zassert_equal(DT_INST_IRQN(0), 30, "");
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#else
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zassert_equal(DT_INST_IRQN(0), ((30 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
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#endif
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/* DT_INST_IRQN_BY_IDX */
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#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
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zassert_equal(DT_INST_IRQN_BY_IDX(0, 0), 30, "");
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zassert_equal(DT_INST_IRQN_BY_IDX(0, 1), 40, "");
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zassert_equal(DT_INST_IRQN_BY_IDX(0, 2), 60, "");
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#else
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zassert_equal(DT_INST_IRQN_BY_IDX(0, 0),
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((30 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
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zassert_equal(DT_INST_IRQN_BY_IDX(0, 1),
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((40 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
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zassert_equal(DT_INST_IRQN_BY_IDX(0, 2),
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((60 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
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#endif
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/* DT_INST_IRQ_HAS_CELL_AT_IDX */
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zassert_true(DT_INST_IRQ_HAS_CELL_AT_IDX(0, 0, irq), "");
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@ -8,5 +8,6 @@ tests:
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- qemu_x86
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- qemu_x86_64
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- qemu_cortex_m3
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- qemu_riscv32
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integration_platforms:
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- native_posix
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