tests: devicetree: api: add tests for new DT APIs

Add tests for new DT APIs added in the previous commit:
- `DT_IRQN_BY_IDX`
- `DT_INST_IRQN_BY_IDX`

Added additional tests for the following existing DT APIs when
`CONFIG_MULTI_LEVEL_INTERRUPTS` is enabled:
- `DT_IRQN`
- `DT_INST_IRQN`

Added `qemu_riscv32` for the multi-level interrupt tests.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
This commit is contained in:
Yong Cong Sin 2023-10-04 21:59:13 +08:00 committed by Chris Friedt
parent df2c0681d3
commit 1782011d2c
3 changed files with 41 additions and 0 deletions

View file

@ -415,6 +415,7 @@
reg = <0xbbbbcccc 0x1000>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <11 0>;
};
/* there should only be one of these */
@ -422,6 +423,7 @@
compatible = "vnd,interrupt-holder";
status = "okay";
interrupts = <30 3 40 5 60 7>;
interrupt-parent = <&test_intc>;
interrupt-names = "err", "stat", "done";
};

View file

@ -707,6 +707,26 @@ ZTEST(devicetree_api, test_irq)
/* DT_IRQN */
zassert_equal(DT_IRQN(TEST_I2C_BUS), 6, "");
#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
zassert_equal(DT_IRQN(DT_INST(0, DT_DRV_COMPAT)), 30, "");
#else
zassert_equal(DT_IRQN(DT_INST(0, DT_DRV_COMPAT)),
((30 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
#endif
/* DT_IRQN_BY_IDX */
#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 0), 30, "");
zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 1), 40, "");
zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 2), 60, "");
#else
zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 0),
((30 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 1),
((40 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
zassert_equal(DT_IRQN_BY_IDX(DT_INST(0, DT_DRV_COMPAT), 2),
((60 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
#endif
/* DT_INST */
zassert_equal(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT), 1, "");
@ -738,7 +758,25 @@ ZTEST(devicetree_api, test_irq)
zassert_equal(DT_INST_IRQ(0, priority), 3, "");
/* DT_INST_IRQN */
#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
zassert_equal(DT_INST_IRQN(0), 30, "");
#else
zassert_equal(DT_INST_IRQN(0), ((30 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
#endif
/* DT_INST_IRQN_BY_IDX */
#ifndef CONFIG_MULTI_LEVEL_INTERRUPTS
zassert_equal(DT_INST_IRQN_BY_IDX(0, 0), 30, "");
zassert_equal(DT_INST_IRQN_BY_IDX(0, 1), 40, "");
zassert_equal(DT_INST_IRQN_BY_IDX(0, 2), 60, "");
#else
zassert_equal(DT_INST_IRQN_BY_IDX(0, 0),
((30 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
zassert_equal(DT_INST_IRQN_BY_IDX(0, 1),
((40 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
zassert_equal(DT_INST_IRQN_BY_IDX(0, 2),
((60 + 1) << CONFIG_1ST_LEVEL_INTERRUPT_BITS) | 11, "");
#endif
/* DT_INST_IRQ_HAS_CELL_AT_IDX */
zassert_true(DT_INST_IRQ_HAS_CELL_AT_IDX(0, 0, irq), "");

View file

@ -8,5 +8,6 @@ tests:
- qemu_x86
- qemu_x86_64
- qemu_cortex_m3
- qemu_riscv32
integration_platforms:
- native_posix