drivers: gpio: mcux_lpc: Support MCI_IO_MUX

Support MCI_IO_MUX pinctrl in LPC GPIO driver

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Co-authored-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Declan Snyder 2024-03-07 17:16:01 -06:00 committed by Fabio Baltieri
parent 6f4cf5c73c
commit 17ab3d5deb

View file

@ -1,5 +1,5 @@
/*
* Copyright 2017-2020,2023 NXP
* Copyright 2017-2020,2022-2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -26,6 +26,9 @@
#endif
#include <fsl_gpio.h>
#include <fsl_device_registers.h>
#ifdef MCI_IO_MUX
#include <zephyr/drivers/pinctrl.h>
#endif
/* Interrupt sources, matching int-source enum in DTS binding definition */
#define INT_SOURCE_PINT 0
@ -40,8 +43,12 @@ struct gpio_mcux_lpc_config {
uint8_t int_source;
#ifdef IOPCTL
IOPCTL_Type *pinmux_base;
#else
#endif
#ifdef IOCON
IOCON_Type *pinmux_base;
#endif
#ifdef MCI_IO_MUX
MCI_IO_MUX_Type * pinmux_base;
#endif
uint32_t port_no;
};
@ -81,8 +88,8 @@ static int gpio_mcux_lpc_configure(const struct device *dev, gpio_pin_t pin,
}
/* Select GPIO mux for this pin (func 0 is always GPIO) */
*pinconfig &= ~(IOPCTL_PIO_FSEL_MASK);
#else /* LPC SOCs */
#endif
#ifdef IOCON /* LPC SOCs */
volatile uint32_t *pinconfig;
IOCON_Type *pinmux_base;
@ -101,6 +108,23 @@ static int gpio_mcux_lpc_configure(const struct device *dev, gpio_pin_t pin,
/* Select GPIO mux for this pin (func 0 is always GPIO) */
*pinconfig &= ~(IOCON_PIO_FUNC_MASK);
#endif
#ifdef MCI_IO_MUX /* RW61x SOCs */
/* Construct a pin control state, and apply it directly. */
pinctrl_soc_pin_t pin_cfg;
if (config->port_no == 1) {
pin_cfg = IOMUX_GPIO_IDX(pin + 32) | IOMUX_TYPE(IOMUX_GPIO);
} else {
pin_cfg = IOMUX_GPIO_IDX(pin) | IOMUX_TYPE(IOMUX_GPIO);
}
/* Add pull up flags, if required */
if ((flags & GPIO_PULL_UP) != 0) {
pin_cfg |= IOMUX_PAD_PULL(0x1);
} else if ((flags & GPIO_PULL_DOWN) != 0) {
pin_cfg |= IOMUX_PAD_PULL(0x2);
}
pinctrl_configure_pins(&pin_cfg, 1, 0);
#endif
if (flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) {
#ifdef IOPCTL /* RT600 and RT500 series */
@ -110,7 +134,8 @@ static int gpio_mcux_lpc_configure(const struct device *dev, gpio_pin_t pin,
} else if ((flags & GPIO_PULL_DOWN) != 0) {
*pinconfig &= ~(IOPCTL_PIO_PULLUP_EN);
}
#else /* LPC SOCs */
#endif
#ifdef IOCON /* LPC SOCs */
*pinconfig &= ~(IOCON_PIO_MODE_PULLUP|IOCON_PIO_MODE_PULLDOWN);
if ((flags & GPIO_PULL_UP) != 0) {
@ -122,8 +147,12 @@ static int gpio_mcux_lpc_configure(const struct device *dev, gpio_pin_t pin,
} else {
#ifdef IOPCTL /* RT600 and RT500 series */
*pinconfig &= ~IOPCTL_PIO_PUPD_EN;
#else /* LPC SOCs */
#endif
#ifdef IOCON /* LPC SOCs */
*pinconfig &= ~(IOCON_PIO_MODE_PULLUP|IOCON_PIO_MODE_PULLDOWN);
#endif
#ifdef MCI_IO_MUX
#endif
}
@ -400,9 +429,13 @@ static const struct gpio_driver_api gpio_mcux_lpc_driver_api = {
#ifdef IOPCTL
#define PINMUX_BASE IOPCTL
#else
#endif
#ifdef IOCON
#define PINMUX_BASE IOCON
#endif
#ifdef MCI_IO_MUX
#define PINMUX_BASE MCI_IO_MUX
#endif
#define GPIO_MCUX_LPC_MODULE_IRQ_CONNECT(inst) \
do { \