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arm: systick: default CORTEX_M_SYSTICK based on dts

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Use setting from devicetree to drive the default setting for
CORTEX_M_SYSTICK.  We update the dts files to default systick to be
enabled since the major of cortex-m platforms utilize it by default
(except on Nordic SoCs, TI CC13x2/CC26x2 and MEC1501 in which we
default to disabled).

Fixes #25299

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit is contained in:
Kumar Gala 2020-09-08 12:51:54 -05:00 committed by Ioannis Glaropoulos
parent 29f4c5e1cf
commit 184a25769c
12 changed files with 39 additions and 3 deletions
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7
drivers/timer/Kconfig
View file

@ -120,9 +120,16 @@ config ARM_ARCH_TIMER
timer which provides per-cpu timers attached to a GIC to deliver its timer which provides per-cpu timers attached to a GIC to deliver its
per-processor interrupts via PPIs. per-processor interrupts via PPIs.
DT_COMPAT_ARM_V6M_SYSTICK := arm,armv6m-systick
DT_COMPAT_ARM_V7M_SYSTICK := arm,armv7m-systick
DT_COMPAT_ARM_V8M_SYSTICK := arm,armv8m-systick
config CORTEX_M_SYSTICK config CORTEX_M_SYSTICK
bool "Cortex-M SYSTICK timer" bool "Cortex-M SYSTICK timer"
depends on CPU_CORTEX_M_HAS_SYSTICK depends on CPU_CORTEX_M_HAS_SYSTICK
default $(dt_compat_enabled,$(DT_COMPAT_ARM_V6M_SYSTICK)) || \
$(dt_compat_enabled,$(DT_COMPAT_ARM_V7M_SYSTICK)) || \
$(dt_compat_enabled,$(DT_COMPAT_ARM_V8M_SYSTICK))
select TICKLESS_CAPABLE select TICKLESS_CAPABLE
help help
This module implements a kernel device driver for the Cortex-M processor This module implements a kernel device driver for the Cortex-M processor

1
dts/arm/armv6-m.dtsi
View file

@ -20,7 +20,6 @@
systick: timer@e000e010 { systick: timer@e000e010 {
compatible = "arm,armv6m-systick"; compatible = "arm,armv6m-systick";
reg = <0xe000e010 0x10>; reg = <0xe000e010 0x10>;
status = "disabled";
}; };
}; };
}; };

1
dts/arm/armv7-m.dtsi
View file

@ -20,7 +20,6 @@
systick: timer@e000e010 { systick: timer@e000e010 {
compatible = "arm,armv7m-systick"; compatible = "arm,armv7m-systick";
reg = <0xe000e010 0x10>; reg = <0xe000e010 0x10>;
status = "disabled";
}; };
}; };
}; };

1
dts/arm/armv8-m.dtsi
View file

@ -20,7 +20,6 @@
systick: timer@e000e010 { systick: timer@e000e010 {
compatible = "arm,armv8m-systick"; compatible = "arm,armv8m-systick";
reg = <0xe000e010 0x10>; reg = <0xe000e010 0x10>;
status = "disabled";
}; };
}; };
}; };

4
dts/arm/microchip/mec1501hsz.dtsi
View file

@ -424,3 +424,7 @@
&nvic { &nvic {
arm,num-irq-priority-bits = <3>; arm,num-irq-priority-bits = <3>;
}; };
&systick {
status = "disabled";
};

4
dts/arm/nordic/nrf5340_cpuapp.dtsi
View file

@ -95,3 +95,7 @@
&nvic { &nvic {
arm,num-irq-priority-bits = <3>; arm,num-irq-priority-bits = <3>;
}; };
&systick {
status = "disabled";
};

4
dts/arm/nordic/nrf5340_cpuappns.dtsi
View file

@ -63,3 +63,7 @@
&nvic { &nvic {
arm,num-irq-priority-bits = <3>; arm,num-irq-priority-bits = <3>;
}; };
&systick {
status = "disabled";
};

4
dts/arm/nordic/nrf5340_cpunet.dtsi
View file

@ -248,3 +248,7 @@
&nvic { &nvic {
arm,num-irq-priority-bits = <3>; arm,num-irq-priority-bits = <3>;
}; };
&systick {
status = "disabled";
};

4
dts/arm/nordic/nrf5_common.dtsi
View file

@ -8,3 +8,7 @@
label = "SW_PWM"; label = "SW_PWM";
}; };
}; };
&systick {
status = "disabled";
};

4
dts/arm/nordic/nrf9160.dtsi
View file

@ -94,3 +94,7 @@
&nvic { &nvic {
arm,num-irq-priority-bits = <3>; arm,num-irq-priority-bits = <3>;
}; };
&systick {
status = "disabled";
};

4
dts/arm/nordic/nrf9160ns.dtsi
View file

@ -60,3 +60,7 @@
&nvic { &nvic {
arm,num-irq-priority-bits = <3>; arm,num-irq-priority-bits = <3>;
}; };
&systick {
status = "disabled";
};

4
dts/arm/ti/cc13x2_cc26x2.dtsi
View file

@ -131,3 +131,7 @@
&nvic { &nvic {
arm,num-irq-priority-bits = <3>; arm,num-irq-priority-bits = <3>;
}; };
&systick {
status = "disabled";
};