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drivers: dma_mcux_lpc: Add Kconfig to reduce data

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Add a Kconfig to have the ability to fine tune the amount of RAM that
the driver uses based on the number of channels expected to be used.

Most of the code is already there but just need this Kconfig to get the
benefit of it by reducing the size of the statically created arrays.

Also change the number of channels field in the configuration to a byte
instead of a 32 bit integer because that should be sufficient to
describe the number of DMA channels.

Rename LPC DMA Driver Kconfigs with namespace to MCUX_LPC

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This commit is contained in:
Declan Snyder 2023-07-12 13:06:14 -05:00 committed by David Leach
parent c6e3bac4f2
commit 191ad08154
2 changed files with 26 additions and 5 deletions
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15
drivers/dma/Kconfig.mcux_lpc
View file

@ -10,7 +10,7 @@ config DMA_MCUX_LPC
if DMA_MCUX_LPC
config DMA_NUMBER_OF_DESCRIPTORS
config DMA_MCUX_LPC_NUMBER_OF_DESCRIPTORS
int "Number of DMA descriptors to use"
default 16
help
@ -18,4 +18,17 @@ config DMA_NUMBER_OF_DESCRIPTORS
Increase or decrease this value depending on the max number of data
transferred by the application.
config DMA_MCUX_LPC_NUMBER_OF_CHANNELS_ALLOCATED
int "Number of DMA channels to allocate memory for in driver"
default 0
help
The MCUX LPC DMA driver can save memory by not allocating static data
depending on this value. So, the application can save some data memory
space by setting this value to suit its needs. The meaning of the value
is "total number of unique DMA channels ever expected to be used, maximum
out of all DMA controllers". A value of 0 (default) means to allocate
as many channel data structures as the maximum number of DMA channels
in any DMA controller hardware. About 1 KB per 3-4 channels unused can
be saved by fine tuning this Kconfig.
endif # DMA_MCUX_LPC

16
drivers/dma/dma_mcux_lpc.c
View file

@ -16,6 +16,8 @@
#include <zephyr/logging/log.h>
#include <zephyr/irq.h>
#include <zephyr/sys/barrier.h>
#include <zephyr/sys/util.h>
#include <zephyr/sys/util_macro.h>
#define DT_DRV_COMPAT nxp_lpc_dma
@ -23,15 +25,15 @@ LOG_MODULE_REGISTER(dma_mcux_lpc, CONFIG_DMA_LOG_LEVEL);
struct dma_mcux_lpc_config {
DMA_Type *base;
uint32_t num_of_channels;
uint32_t otrig_base_address;
uint32_t itrig_base_address;
uint8_t num_of_channels;
uint8_t num_of_otrigs;
void (*irq_config_func)(const struct device *dev);
};
struct channel_data {
SDK_ALIGN(dma_descriptor_t dma_descriptor_table[CONFIG_DMA_NUMBER_OF_DESCRIPTORS],
SDK_ALIGN(dma_descriptor_t dma_descriptor_table[CONFIG_DMA_MCUX_LPC_NUMBER_OF_DESCRIPTORS],
FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE);
dma_handle_t dma_handle;
const struct device *dev;
@ -131,7 +133,7 @@ static int dma_mcux_lpc_queue_descriptors(struct channel_data *data,
/* Increase the number of descriptors queued */
data->num_of_descriptors++;
if (data->num_of_descriptors >= CONFIG_DMA_NUMBER_OF_DESCRIPTORS) {
if (data->num_of_descriptors >= CONFIG_DMA_MCUX_LPC_NUMBER_OF_DESCRIPTORS) {
return -ENOMEM;
}
/* Do we need to queue additional DMA descriptors for this block */
@ -715,6 +717,12 @@ static const struct dma_driver_api dma_mcux_lpc_api = {
DMA_MCUX_LPC_DECLARE_CFG(n, \
DMA_MCUX_LPC_IRQ_CFG_FUNC_INIT(n))
#define DMA_MCUX_LPC_NUM_USED_CHANNELS(n) \
COND_CODE_0(CONFIG_DMA_MCUX_LPC_NUMBER_OF_CHANNELS_ALLOCATED, \
(DT_INST_PROP(n, dma_channels)), \
(MIN(CONFIG_DMA_MCUX_LPC_NUMBER_OF_CHANNELS_ALLOCATED, \
DT_INST_PROP(n, dma_channels))))
#define DMA_MCUX_LPC_DECLARE_CFG(n, IRQ_FUNC_INIT) \
static const struct dma_mcux_lpc_config dma_##n##_config = { \
.base = (DMA_Type *)DT_INST_REG_ADDR(n), \
@ -730,7 +738,7 @@ static const struct dma_mcux_lpc_config dma_##n##_config = { \
static const struct dma_mcux_lpc_config dma_##n##_config; \
\
static struct channel_data dma_##n##_channel_data_arr \
[DT_INST_PROP(n, dma_channels)] = {0}; \
[DMA_MCUX_LPC_NUM_USED_CHANNELS(n)] = {0}; \
\
static struct dma_otrig dma_##n##_otrig_arr \
[DT_INST_PROP_OR(n, nxp_dma_num_of_otrigs, 0)]; \