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nxp: imx8qm/imx8qxp: enable IRQSTEER on QM/QXP boards

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This commit enables the IRQSTEER interrupt controller
on NXP's XTENSA-based i.MX8QM and i.MX8QXP.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This commit is contained in:
Laurentiu Mihalcea 2024-03-06 13:50:05 +02:00 committed by Henrik Brix Andersen
parent d03778f9e6
commit 1bf02c58ae
4 changed files with 110 additions and 9 deletions
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16
boards/nxp/imx8qm_mek/imx8qm_mek_mimx8qm6_defconfig
View file

@ -16,3 +16,19 @@ CONFIG_CLOCK_CONTROL=y
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# interrupt-related configurations
CONFIG_MULTI_LEVEL_INTERRUPTS=y
CONFIG_2ND_LEVEL_INTERRUPTS=y
CONFIG_2ND_LVL_ISR_TBL_OFFSET=32
CONFIG_MAX_IRQ_PER_AGGREGATOR=64
CONFIG_NUM_2ND_LEVEL_AGGREGATORS=8
CONFIG_2ND_LVL_INTR_00_OFFSET=19
CONFIG_2ND_LVL_INTR_01_OFFSET=20
CONFIG_2ND_LVL_INTR_02_OFFSET=21
CONFIG_2ND_LVL_INTR_03_OFFSET=22
CONFIG_2ND_LVL_INTR_04_OFFSET=23
CONFIG_2ND_LVL_INTR_05_OFFSET=24
CONFIG_2ND_LVL_INTR_06_OFFSET=25
CONFIG_2ND_LVL_INTR_07_OFFSET=26
CONFIG_2ND_LEVEL_INTERRUPT_BITS=9

4
boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp.dts
View file

@ -26,3 +26,7 @@
pinctrl-0 = <&lpuart2_default>;
pinctrl-names = "default";
};
&irqsteer {
reg = <0x51080000 DT_SIZE_K(64)>;
};

16
boards/nxp/imx8qxp_mek/imx8qxp_mek_mimx8qx6_adsp_defconfig
View file

@ -16,3 +16,19 @@ CONFIG_CLOCK_CONTROL=y
CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# interrupt-related configurations
CONFIG_MULTI_LEVEL_INTERRUPTS=y
CONFIG_2ND_LEVEL_INTERRUPTS=y
CONFIG_2ND_LVL_ISR_TBL_OFFSET=32
CONFIG_MAX_IRQ_PER_AGGREGATOR=64
CONFIG_NUM_2ND_LEVEL_AGGREGATORS=8
CONFIG_2ND_LVL_INTR_00_OFFSET=19
CONFIG_2ND_LVL_INTR_01_OFFSET=20
CONFIG_2ND_LVL_INTR_02_OFFSET=21
CONFIG_2ND_LVL_INTR_03_OFFSET=22
CONFIG_2ND_LVL_INTR_04_OFFSET=23
CONFIG_2ND_LVL_INTR_05_OFFSET=24
CONFIG_2ND_LVL_INTR_06_OFFSET=25
CONFIG_2ND_LVL_INTR_07_OFFSET=26
CONFIG_2ND_LEVEL_INTERRUPT_BITS=9

83
dts/xtensa/nxp/nxp_imx8.dtsi
View file

@ -30,6 +30,78 @@
};
};
irqsteer: interrupt-controller@510a0000 {
compatible = "nxp,irqsteer-intc";
reg = <0x510a0000 DT_SIZE_K(64)>;
#size-cells = <0>;
#address-cells = <1>;
master0: interrupt-controller@0 {
compatible = "nxp,irqsteer-master";
reg = <0>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts-extended = <&clic 19 0 0>;
};
master1: interrupt-controller@1 {
compatible = "nxp,irqsteer-master";
reg = <1>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts-extended = <&clic 20 0 0>;
};
master2: interrupt-controller@2 {
compatible = "nxp,irqsteer-master";
reg = <2>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts-extended = <&clic 21 0 0>;
};
master3: interrupt-controller@3 {
compatible = "nxp,irqsteer-master";
reg = <3>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts-extended = <&clic 22 0 0>;
};
master4: interrupt-controller@4 {
compatible = "nxp,irqsteer-master";
reg = <4>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts-extended = <&clic 23 0 0>;
};
master5: interrupt-controller@5 {
compatible = "nxp,irqsteer-master";
reg = <5>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts-extended = <&clic 24 0 0>;
};
master6: interrupt-controller@6 {
compatible = "nxp,irqsteer-master";
reg = <6>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts-extended = <&clic 25 0 0>;
};
master7: interrupt-controller@7 {
compatible = "nxp,irqsteer-master";
reg = <7>;
interrupt-controller;
#interrupt-cells = <1>;
interrupts-extended = <&clic 26 0 0>;
};
};
sram0: memory@92400000 {
device_type = "memory";
compatible = "mmio-sram";
@ -64,15 +136,8 @@
lpuart2: serial@5a080000 {
compatible = "nxp,imx-lpuart", "nxp,kinetis-lpuart";
reg = <0x5a080000 DT_SIZE_K(4)>;
/* TODO: THIS INTID IS JUST A DUMMY ONE UNTIL IRQ_STEER
* DRIVER CAN BE USED ON i.MX8QM/QXP. DO NOT ATTEMPT TO
* ENABLE UART INTERRUPT SUPPORT.
*
* THE CURRENT INTID VALUE IS CHOSEN SUCH THAT gen_isr_tables.py
* WILL BREAK IF YOU ATTEMPT TO IRQ_CONNECT().
*/
interrupt-parent = <&clic>;
interrupts = <259 0 0>;
interrupt-parent = <&master4>;
interrupts = <3>;
/* this is actually LPUART2 clock but the macro indexing starts at 1 */
clocks = <&ccm IMX_CCM_LPUART3_CLK 0x0 0x0>;
status = "disabled";