boards: arm: stm32h750b_dk: add support for sdram
128 Mbit sdram devicetree definition Signed-off-by: Toon Stegen <toon@toostsolutions.be>
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@ -21,6 +21,14 @@
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zephyr,flash-controller = &mt25ql512ab1;
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};
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sdram2: sdram@d0000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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device_type = "memory";
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reg = <0xd0000000 DT_SIZE_M(16)>; /* 128Mbit */
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zephyr,memory-region = "SDRAM2";
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zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
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};
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leds {
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compatible = "gpio-leds";
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red_led: led_1 {
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@ -121,3 +129,39 @@
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status = "okay";
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};
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};
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&fmc {
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pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
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&fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke1_ph7
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&fmc_sdne1_ph6 &fmc_sdnras_pf11 &fmc_sdncas_pg15
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&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
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&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
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&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
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&fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15
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&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
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&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
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&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
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&fmc_d15_pd10>;
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pinctrl-names = "default";
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status = "okay";
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sdram {
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status = "okay";
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power-up-delay = <100>;
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num-auto-refresh = <8>;
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mode-register = <0x220>;
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refresh-rate = <0x603>;
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bank@1 {
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reg = <1>;
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st,sdram-control = <STM32_FMC_SDRAM_NC_8
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STM32_FMC_SDRAM_NR_12
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STM32_FMC_SDRAM_MWID_16
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STM32_FMC_SDRAM_NB_4
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STM32_FMC_SDRAM_CAS_3
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STM32_FMC_SDRAM_SDCLK_PERIOD_2
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STM32_FMC_SDRAM_RBURST_ENABLE
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STM32_FMC_SDRAM_RPIPE_0>;
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st,sdram-timing = <2 7 4 7 2 2 2>;
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};
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};
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};
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