boards: nsim: add initial support of normal/non-secure application

normal/non-secure application: nsim_sem_normal

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>

boards/arc/nsim/arc_mpu_regions.c

@@ -9,6 +9,10 @@
 #include <arch/arc/v2/mpu/arc_mpu.h>
 #include <linker/linker-defs.h>
 
+/*
+ * for secure firmware, MPU entries are only set up for secure world.
+ * All regions not listed here are shared by secure world and normal world.
+ */
 static struct arc_mpu_region mpu_regions[] = {
 #if DT_ICCM_SIZE > 0
 	/* Region ICCM */
@@ -24,11 +28,19 @@ static struct arc_mpu_region mpu_regions[] = {
 			 DT_DCCM_SIZE * 1024,
 			 REGION_KERNEL_RAM_ATTR | REGION_DYNAMIC),
 #endif
+
+/*
+ * Region peripheral is shared by secure world and normal world by default,
+ * no need a static mpu entry. If some peripherals belong to secure world,
+ * add it here.
+ */
+#ifndef CONFIG_ARC_SECURE_FIRMWARE
 	/* Region Peripheral */
 	MPU_REGION_ENTRY("PERIPHERAL",
 			 0xF0000000,
 			 64 * 1024,
 			 REGION_KERNEL_RAM_ATTR),
+#endif
 };
 
 struct arc_mpu_config mpu_config = {

boards/arc/nsim/nsim_sem.dts

@@ -1,18 +1,32 @@
 /*
- * Copyright (c) 2018, 2019, Synopsys, Inc. All rights reserved.
+ * Copyright (c) 2018, Synopsys, Inc. All rights reserved.
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
+
 /dts-v1/;
 
 #include "nsim_em.dtsi"
 
 / {
-	model = "snps,nsim_sem";
-	compatible = "snps,nsim_sem";
-};
 
-&cpu0 {
-	clock-frequency = <5000000>;
+	model = "nsim_sem";
+	compatible = "snps,nsim_sem";
+
+	iccm0: iccm@0 {
+		device_type = "memory";
+		compatible = "arc,iccm";
+		reg = <0x0 0x40000>;
+	};
+
+	dccm0: dccm@80000000 {
+		device_type = "memory";
+		compatible = "arc,dccm";
+		reg = <0x80000000 0x40000>;
+	};
+
+	chosen {
+		zephyr,sram = &dccm0;
+	};
 };

boards/arc/nsim/nsim_sem_defconfig

@@ -16,3 +16,4 @@ CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y
 CONFIG_ARC_EXCEPTION_DEBUG=y
+CONFIG_TRUSTED_EXECUTION_SECURE=y

boards/arc/nsim/nsim_sem_mpu_stack_guard_defconfig

@@ -17,3 +17,4 @@ CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
 CONFIG_SERIAL=y
 CONFIG_ARC_EXCEPTION_DEBUG=y
+CONFIG_TRUSTED_EXECUTION_SECURE=y

boards/arc/nsim/nsim_sem_normal.dts

@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2018, Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include <mem.h>
+#include "nsim_em.dtsi"
+
+/ {
+
+	model = "nsim_sem_normal";
+	compatible = "snps,nsim_sem_normal";
+
+	iccm0: iccm@0 {
+		device_type = "memory";
+		compatible = "arc,iccm";
+		reg = <0x40000 DT_SIZE_K(256)>;
+	};
+
+	dccm0: dccm@80000000 {
+		device_type = "memory";
+		compatible = "arc,dccm";
+		reg = <0x80040000 DT_SIZE_K(256)>;
+	};
+
+	chosen {
+		zephyr,sram = &dccm0;
+	};
+
+};

boards/arc/nsim/nsim_sem_normal.yaml

@@ -0,0 +1,11 @@
+identifier: nsim_sem_normal
+name: SEM in normal mode of Nsim simulator
+type: mcu
+arch: arc
+simulation: nsim
+toolchain:
+  - zephyr
+testing:
+  ignore_tags:
+    - net
+    - bluetooth

boards/arc/nsim/nsim_sem_normal_defconfig

@@ -0,0 +1,16 @@
+CONFIG_ARC=y
+CONFIG_CPU_ARCEM=y
+CONFIG_SOC_NSIM=y
+CONFIG_SOC_NSIM_SEM=y
+CONFIG_BOARD_NSIM=y
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=100
+CONFIG_XIP=n
+CONFIG_BUILD_OUTPUT_BIN=n
+CONFIG_PRINTK=y
+CONFIG_ARCV2_INTERRUPT_UNIT=y
+CONFIG_ARCV2_TIMER=y
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_SERIAL=y
+CONFIG_ARC_EXCEPTION_DEBUG=y
+CONFIG_TRUSTED_EXECUTION_NONSECURE=y

soc/arc/snps_nsim/Kconfig.defconfig.em

@@ -16,7 +16,7 @@ config NUM_IRQ_PRIO_LEVELS
 
 config NUM_IRQS
 	# must be > the highest interrupt number used
-	default 20
+	default 30
 
 config ARC_MPU_VER
 	default 2

soc/arc/snps_nsim/Kconfig.defconfig.sem

@@ -16,7 +16,7 @@ config NUM_IRQ_PRIO_LEVELS
 
 config NUM_IRQS
 	# must be > the highest interrupt number used
-	default 22
+	default 30
 
 config ARC_MPU_VER
 	default 3