nxp: imx8: change CONFIG_SOC_<name> to match the value

Change, for audio DSP and M7 cores, SOC_<name> to match
the exact soc name.
Update the board files accordingly.

These configs are used in SOF and NXP_HAL, so change
sha for these modules.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
This commit is contained in:
Iuliana Prodan 2024-03-26 20:00:39 +02:00 committed by Johan Hedberg
parent a7988f2986
commit 1f55be8b42
24 changed files with 61 additions and 61 deletions

View file

@ -3,6 +3,6 @@
config BOARD_IMX8MP_EVK
select SOC_MIMX8ML8_A53 if BOARD_IMX8MP_EVK_MIMX8ML8_A53 || BOARD_IMX8MP_EVK_MIMX8ML8_A53_SMP
select SOC_MIMX8MP_ADSP if BOARD_IMX8MP_EVK_MIMX8ML8_ADSP
select SOC_MIMX8MP_M7 if BOARD_IMX8MP_EVK_MIMX8ML8_M7 || BOARD_IMX8MP_EVK_MIMX8ML8_M7_DDR
select SOC_MIMX8ML8_ADSP if BOARD_IMX8MP_EVK_MIMX8ML8_ADSP
select SOC_MIMX8ML8_M7 if BOARD_IMX8MP_EVK_MIMX8ML8_M7 || BOARD_IMX8MP_EVK_MIMX8ML8_M7_DDR
select SOC_PART_NUMBER_MIMX8ML8DVNLZ

View file

@ -4,14 +4,14 @@
# SPDX-License-Identifier: Apache-2.0
#
if(CONFIG_SOC_MIMX8MP_ADSP)
if(CONFIG_SOC_MIMX8ML8_ADSP)
board_set_flasher_ifnset(misc-flasher)
board_finalize_runner_args(misc-flasher)
board_set_rimage_target(imx8m)
endif()
if(CONFIG_SOC_MIMX8MP_M7)
if(CONFIG_SOC_MIMX8ML8_M7)
board_set_debugger_ifnset(jlink)
board_set_flasher_ifnset(jlink)

View file

@ -4,5 +4,5 @@
# SPDX-License-Identifier: Apache-2.0
config BOARD_IMX8QM_MEK
select SOC_MIMX8QM_ADSP if BOARD_IMX8QM_MEK_MIMX8QM6_ADSP
select SOC_MIMX8QM6_ADSP if BOARD_IMX8QM_MEK_MIMX8QM6_ADSP
select SOC_PART_NUMBER_MIMX8QM6AVUFF

View file

@ -4,7 +4,7 @@
# SPDX-License-Identifier: Apache-2.0
#
if(CONFIG_SOC_MIMX8QM_ADSP)
if(CONFIG_SOC_MIMX8QM6_ADSP)
board_set_flasher_ifnset(misc-flasher)
board_finalize_runner_args(misc-flasher)

View file

@ -4,5 +4,5 @@
# SPDX-License-Identifier: Apache-2.0
config BOARD_IMX8QXP_MEK
select SOC_MIMX8QXP_ADSP if BOARD_IMX8QXP_MEK_MIMX8QX6_ADSP
select SOC_MIMX8QX6_ADSP if BOARD_IMX8QXP_MEK_MIMX8QX6_ADSP
select SOC_PART_NUMBER_MIMX8QX6AVLFZ

View file

@ -4,7 +4,7 @@
# SPDX-License-Identifier: Apache-2.0
#
if(CONFIG_SOC_MIMX8QXP_ADSP)
if(CONFIG_SOC_MIMX8QX6_ADSP)
board_set_flasher_ifnset(misc-flasher)
board_finalize_runner_args(misc-flasher)

View file

@ -2,5 +2,5 @@
# SPDX-License-Identifier: Apache-2.0
config BOARD_MIMX8MP_PHYBOARD_POLLUX
select SOC_MIMX8MP_M7 if BOARD_MIMX8MP_PHYBOARD_POLLUX_MIMX8ML8_M7
select SOC_MIMX8ML8_M7 if BOARD_MIMX8MP_PHYBOARD_POLLUX_MIMX8ML8_M7
select SOC_PART_NUMBER_MIMX8ML8DVNLZ

View file

@ -5,5 +5,5 @@
# SPDX-License-Identifier: Apache-2.0
config BOARD_VERDIN_IMX8MP
select SOC_MIMX8MP_M7 if BOARD_VERDIN_IMX8MP_MIMX8ML8_M7 || BOARD_VERDIN_IMX8MP_MIMX8ML8_M7_DDR
select SOC_MIMX8ML8_M7 if BOARD_VERDIN_IMX8MP_MIMX8ML8_M7 || BOARD_VERDIN_IMX8MP_MIMX8ML8_M7_DDR
select SOC_PART_NUMBER_MIMX8ML8DVNLZ

View file

@ -12,7 +12,7 @@
#include <zephyr/dt-bindings/clock/imx_ccm.h>
#include <fsl_clock.h>
#if defined(CONFIG_SOC_MIMX8QM_ADSP) || defined(CONFIG_SOC_MIMX8QXP_ADSP)
#if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP)
#include <main/ipc.h>
#endif
@ -46,7 +46,7 @@ static const clock_ip_name_t uart_clocks[] = {
#ifdef CONFIG_UART_MCUX_LPUART
#ifdef CONFIG_SOC_MIMX8QM_ADSP
#ifdef CONFIG_SOC_MIMX8QM6_ADSP
static const clock_ip_name_t lpuart_clocks[] = {
kCLOCK_DMA_Lpuart0,
kCLOCK_DMA_Lpuart1,
@ -56,9 +56,9 @@ static const clock_ip_name_t lpuart_clocks[] = {
};
static const uint32_t lpuart_rate = MHZ(80);
#endif /* CONFIG_SOC_MIMX8QM_ADSP */
#endif /* CONFIG_SOC_MIMX8QM6_ADSP */
#ifdef CONFIG_SOC_MIMX8QXP_ADSP
#ifdef CONFIG_SOC_MIMX8QX6_ADSP
static const clock_ip_name_t lpuart_clocks[] = {
kCLOCK_DMA_Lpuart0,
kCLOCK_DMA_Lpuart1,
@ -67,7 +67,7 @@ static const clock_ip_name_t lpuart_clocks[] = {
};
static const uint32_t lpuart_rate = MHZ(80);
#endif /* CONFIG_SOC_MIMX8QXP_ADSP */
#endif /* CONFIG_SOC_MIMX8QX6_ADSP */
#endif /* CONFIG_UART_MCUX_LPUART */
@ -88,7 +88,7 @@ static int mcux_ccm_on(const struct device *dev,
return 0;
#endif
#if defined(CONFIG_UART_MCUX_LPUART) && defined(CONFIG_SOC_MIMX8QM_ADSP)
#if defined(CONFIG_UART_MCUX_LPUART) && defined(CONFIG_SOC_MIMX8QM6_ADSP)
case IMX_CCM_LPUART1_CLK:
case IMX_CCM_LPUART2_CLK:
case IMX_CCM_LPUART3_CLK:
@ -98,7 +98,7 @@ static int mcux_ccm_on(const struct device *dev,
return 0;
#endif
#if defined(CONFIG_UART_MCUX_LPUART) && defined(CONFIG_SOC_MIMX8QXP_ADSP)
#if defined(CONFIG_UART_MCUX_LPUART) && defined(CONFIG_SOC_MIMX8QX6_ADSP)
case IMX_CCM_LPUART1_CLK:
case IMX_CCM_LPUART2_CLK:
case IMX_CCM_LPUART3_CLK:
@ -174,7 +174,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
#ifdef CONFIG_UART_MCUX_LPUART
#if defined(CONFIG_SOC_MIMX8QM_ADSP)
#if defined(CONFIG_SOC_MIMX8QM6_ADSP)
case IMX_CCM_LPUART1_CLK:
case IMX_CCM_LPUART2_CLK:
case IMX_CCM_LPUART3_CLK:
@ -186,7 +186,7 @@ static int mcux_ccm_get_subsys_rate(const struct device *dev,
*rate = CLOCK_GetIpFreq(lpuart_clocks[instance]);
break;
#elif defined(CONFIG_SOC_MIMX8QXP_ADSP)
#elif defined(CONFIG_SOC_MIMX8QX6_ADSP)
case IMX_CCM_LPUART1_CLK:
case IMX_CCM_LPUART2_CLK:
case IMX_CCM_LPUART3_CLK:
@ -428,7 +428,7 @@ static const struct clock_control_driver_api mcux_ccm_driver_api = {
static int mcux_ccm_init(const struct device *dev)
{
#if defined(CONFIG_SOC_MIMX8QM_ADSP) || defined(CONFIG_SOC_MIMX8QXP_ADSP)
#if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP)
sc_ipc_t ipc_handle;
int ret;

View file

@ -1,7 +1,7 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_SOC_MIMX8QM_ADSP)
if(CONFIG_SOC_MIMX8QM6_ADSP)
zephyr_include_directories(adsp)
add_subdirectory(adsp)

View file

@ -1,7 +1,7 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
config SOC_MIMX8QM_ADSP
config SOC_MIMX8QM6_ADSP
select XTENSA
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
select XTENSA_RESET_VECTOR
@ -13,4 +13,4 @@ config SOC_MIMX8QM_ADSP
select CPU_HAS_DCACHE
config MCUX_CORE_SUFFIX
default "_dsp" if SOC_MIMX8QM_ADSP
default "_dsp" if SOC_MIMX8QM6_ADSP

View file

@ -3,7 +3,7 @@
if SOC_SERIES_IMX8
if SOC_MIMX8QM_ADSP
if SOC_MIMX8QM6_ADSP
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 666000000
@ -40,6 +40,6 @@ config TEST_LOGGING_DEFAULTS
default n
depends on TEST
endif # SOC_MIMX8QM_ADSP
endif # SOC_MIMX8QM6_ADSP
endif # SOC_SERIES_IMX8

View file

@ -8,22 +8,22 @@ config SOC_SERIES_IMX8
config SOC_SERIES
default "imx8" if SOC_SERIES_IMX8
config SOC_MIMX8QM
config SOC_MIMX8QM6
bool
select SOC_SERIES_IMX8
config SOC
default "mimx8qm6" if SOC_MIMX8QM
default "mimx8qm6" if SOC_MIMX8QM6
config SOC_MIMX8QM_ADSP
config SOC_MIMX8QM6_ADSP
bool
select SOC_MIMX8QM
select SOC_MIMX8QM6
help
Enable support for NXP i.MX 8QM Audio DSP
config SOC_TOOLCHAIN_NAME
string
default "nxp_imx_adsp" if SOC_MIMX8QM_ADSP
default "nxp_imx_adsp" if SOC_MIMX8QM6_ADSP
config SOC_PART_NUMBER_MIMX8QM6AVUFF
bool

View file

@ -1,7 +1,7 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_SOC_MIMX8MP_ADSP)
if(CONFIG_SOC_MIMX8ML8_ADSP)
zephyr_include_directories(adsp)
add_subdirectory(adsp)
@ -48,6 +48,6 @@ if(CONFIG_SOC_MIMX8MQ6_M4)
add_subdirectory(m4_quad)
endif()
if(CONFIG_SOC_MIMX8MP_M7)
if(CONFIG_SOC_MIMX8ML8_M7)
add_subdirectory(m7)
endif()

View file

@ -39,7 +39,7 @@ config SOC_MIMX8MN6_A53
select HAS_MCUX_IOMUXC if PINCTRL
select HAS_MCUX_RDC
config SOC_MIMX8MP_ADSP
config SOC_MIMX8ML8_ADSP
select XTENSA
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
select XTENSA_RESET_VECTOR
@ -53,7 +53,7 @@ config SOC_MIMX8MP_ADSP
select PINCTRL_IMX if HAS_MCUX_IOMUXC
select CPU_HAS_DCACHE
config SOC_MIMX8MP_M7
config SOC_MIMX8ML8_M7
select ARM
select CPU_CORTEX_M7
select CPU_HAS_FPU
@ -81,9 +81,9 @@ config SOC_MIMX8MQ6_M4
config MCUX_CORE_SUFFIX
default "_ca53" if SOC_MIMX8MM6_A53 || SOC_MIMX8MN6_A53 || SOC_MIMX8ML8_A53
default "_dsp" if SOC_MIMX8MP_ADSP
default "_dsp" if SOC_MIMX8ML8_ADSP
if SOC_MIMX8MP_M7
if SOC_MIMX8ML8_M7
choice CODE_LOCATION
prompt "Code location selection"
@ -99,4 +99,4 @@ endchoice
config INIT_VIDEO_PLL
bool "Initialize Video PLL"
endif # SOC_MIMX8MP_M7
endif # SOC_MIMX8ML8_M7

View file

@ -4,7 +4,7 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
if SOC_MIMX8MP_M7
if SOC_MIMX8ML8_M7
config SOC
string
@ -50,4 +50,4 @@ config PINCTRL_IMX
default y if HAS_MCUX_IOMUXC
depends on PINCTRL
endif # SOC_MIMX8MP_M7
endif # SOC_MIMX8ML8_M7

View file

@ -3,7 +3,7 @@
if SOC_SERIES_IMX8M
if SOC_MIMX8MP_ADSP
if SOC_MIMX8ML8_ADSP
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 800000000
@ -43,6 +43,6 @@ config TEST_LOGGING_DEFAULTS
default n
depends on TEST
endif # SOC_MIMX8MP_ADSP
endif # SOC_MIMX8ML8_ADSP
endif # SOC_SERIES_IMX8M

View file

@ -24,25 +24,25 @@ config SOC_MIMX8MM6_M4
help
NXP i.MX8MM M4
config SOC_MIMX8MP
config SOC_MIMX8ML8
bool
select SOC_SERIES_IMX8M
config SOC_MIMX8ML8_A53
bool
select SOC_MIMX8MP
select SOC_MIMX8ML8
help
NXP i.MX8MP A53
config SOC_MIMX8MP_ADSP
config SOC_MIMX8ML8_ADSP
bool
select SOC_MIMX8MP
select SOC_MIMX8ML8
help
Enable support for NXP i.MX 8MPLUS Audio DSP
config SOC_MIMX8MP_M7
config SOC_MIMX8ML8_M7
bool
select SOC_MIMX8MP
select SOC_MIMX8ML8
help
Enable support for NXP i.MX 8MPLUS M7 MCU
@ -58,7 +58,7 @@ config SOC_MIMX8MQ6_M4
config SOC_TOOLCHAIN_NAME
string
default "nxp_imx8m_adsp" if SOC_MIMX8MP_ADSP
default "nxp_imx8m_adsp" if SOC_MIMX8ML8_ADSP
config SOC_MIMX8MN6
bool
@ -73,7 +73,7 @@ config SOC_MIMX8MN6_A53
config SOC
default "mimx8mm6" if SOC_MIMX8MM6
default "mimx8mn6" if SOC_MIMX8MN6
default "mimx8ml8" if SOC_MIMX8MP
default "mimx8ml8" if SOC_MIMX8ML8
default "mimx8mq6" if SOC_MIMX8MQ6
config SOC_PART_NUMBER_MIMX8ML8DVNLZ

View file

@ -1,7 +1,7 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_SOC_MIMX8QXP_ADSP)
if(CONFIG_SOC_MIMX8QX6_ADSP)
zephyr_include_directories(adsp)
add_subdirectory(adsp)

View file

@ -1,7 +1,7 @@
# Copyright 2024 NXP
# SPDX-License-Identifier: Apache-2.0
config SOC_MIMX8QXP_ADSP
config SOC_MIMX8QX6_ADSP
select XTENSA
select XTENSA_HAL if ("$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" && "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xt-clang")
select XTENSA_RESET_VECTOR
@ -13,4 +13,4 @@ config SOC_MIMX8QXP_ADSP
select CPU_HAS_DCACHE
config MCUX_CORE_SUFFIX
default "_dsp" if SOC_MIMX8QXP_ADSP
default "_dsp" if SOC_MIMX8QX6_ADSP

View file

@ -3,7 +3,7 @@
if SOC_SERIES_IMX8X
if SOC_MIMX8QXP_ADSP
if SOC_MIMX8QX6_ADSP
config SYS_CLOCK_HW_CYCLES_PER_SEC
default 640000000
@ -40,6 +40,6 @@ config TEST_LOGGING_DEFAULTS
default n
depends on TEST
endif # SOC_MIMX8QXP_ADSP
endif # SOC_MIMX8QX6_ADSP
endif # SOC_SERIES_IMX8X

View file

@ -8,22 +8,22 @@ config SOC_SERIES_IMX8X
config SOC_SERIES
default "imx8x" if SOC_SERIES_IMX8X
config SOC_MIMX8QXP
config SOC_MIMX8QX6
bool
select SOC_SERIES_IMX8X
config SOC
default "mimx8qx6" if SOC_MIMX8QXP
default "mimx8qx6" if SOC_MIMX8QX6
config SOC_MIMX8QXP_ADSP
config SOC_MIMX8QX6_ADSP
bool
select SOC_MIMX8QXP
select SOC_MIMX8QX6
help
Enable support for NXP i.MX 8QXP Audio DSP
config SOC_TOOLCHAIN_NAME
string
default "nxp_imx_adsp" if SOC_MIMX8QXP_ADSP
default "nxp_imx_adsp" if SOC_MIMX8QX6_ADSP
config SOC_PART_NUMBER_MIMX8QX6AVLFZ
bool

View file

@ -34,7 +34,7 @@ manifest:
groups:
- optional
- name: sof
revision: 1c1dd3d83d85c3bd2bfd16f6d5bb101e764cb698
revision: c11a3185afbc8e1b2a79916de3dfefaf326d9ad1
path: modules/audio/sof
remote: upstream
groups:

View file

@ -193,7 +193,7 @@ manifest:
groups:
- hal
- name: hal_nxp
revision: 384bb4f17245a7e6b2d83149309134597f1b8a69
revision: 9d32c7382b6383a30ae6095e02f17f9acfa63e7a
path: modules/hal/nxp
groups:
- hal