x86-64: Early TLS initialization
Allow early boot code to use thread local storage when it is enabled. Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
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@ -17,5 +17,5 @@ zephyr_library_sources(
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)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE intel64/userspace.S)
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zephyr_library_sources_ifdef(CONFIG_THREAD_LOCAL_STORAGE intel64/tls.c)
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zephyr_library_sources_ifdef(CONFIG_DEBUG_COREDUMP intel64/coredump.c)
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@ -261,6 +261,11 @@ enter_code64:
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/* Enter C domain now that we have a stack set up, never to return */
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movq %rbp, %rdi
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#ifdef CONFIG_STACK_CANARIES_TLS
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pushq %rsp
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call z_x86_early_tls_update_gdt
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popq %rsp
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#endif
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call z_x86_cpu_init
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/* 64 bit OS entry point, used by EFI support. UEFI
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31
arch/x86/core/intel64/tls.c
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31
arch/x86/core/intel64/tls.c
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@ -0,0 +1,31 @@
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/*
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* Copyright (c) 2023 Intel Corporation.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel_internal.h>
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FUNC_NO_STACK_PROTECTOR
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void z_x86_early_tls_update_gdt(char *stack_ptr)
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{
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uintptr_t *self_ptr;
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uint32_t fs_base = X86_FS_BASE;
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/*
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* Since we are populating things backwards, store
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* the pointer to the TLS area at top of stack.
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*/
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stack_ptr -= sizeof(uintptr_t);
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self_ptr = (void *)stack_ptr;
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*self_ptr = POINTER_TO_UINT(stack_ptr);
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__asm__ volatile(
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"movl %0, %%ecx;\n\t"
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"movq %1, %%rax;\n\t"
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"movq %1, %%rdx;\n\t"
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"shrq $32, %%rdx;\n\t"
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"wrmsr;\n\t"
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:
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: "r"(fs_base), "r"(POINTER_TO_UINT(self_ptr)));
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}
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