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drivers: serial: stm32: use new pinctrl API

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Use the new pinctrl API to configure pins.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2021-09-07 16:39:45 +02:00 committed by Carles Cufí
parent 4b9c3d7134
commit 21a271962c
5 changed files with 8 additions and 45 deletions
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12
drivers/serial/uart_stm32.c
View file

@ -20,8 +20,6 @@
#include <soc.h>
#include <init.h>
#include <drivers/uart.h>
#include <drivers/pinmux.h>
#include <pinmux/pinmux_stm32.h>
#include <drivers/clock_control.h>
#include <pm/pm.h>
@ -1507,9 +1505,7 @@ static int uart_stm32_init(const struct device *dev)
}
/* Configure dt provided device signals when available */
err = stm32_dt_pinctrl_configure(config->pinctrl_list,
config->pinctrl_list_size,
(uint32_t)UART_STRUCT(dev));
err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
if (err < 0) {
return err;
}
@ -1657,8 +1653,7 @@ static void uart_stm32_irq_config_func_##index(const struct device *dev) \
#define STM32_UART_INIT(index) \
STM32_UART_IRQ_HANDLER_DECL(index) \
\
static const struct soc_gpio_pinctrl uart_pins_##index[] = \
ST_STM32_DT_INST_PINCTRL(index, 0); \
PINCTRL_DT_INST_DEFINE(index) \
\
static const struct uart_stm32_config uart_stm32_cfg_##index = { \
.uconf = { \
@ -1670,9 +1665,8 @@ static const struct uart_stm32_config uart_stm32_cfg_##index = { \
}, \
.hw_flow_control = DT_INST_PROP(index, hw_flow_control), \
.parity = DT_INST_ENUM_IDX_OR(index, parity, UART_CFG_PARITY_NONE), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
STM32_UART_POLL_IRQ_HANDLER_FUNC(index) \
.pinctrl_list = uart_pins_##index, \
.pinctrl_list_size = ARRAY_SIZE(uart_pins_##index), \
}; \
\
static struct uart_stm32_data uart_stm32_data_##index = { \

5
drivers/serial/uart_stm32.h
View file

@ -12,7 +12,7 @@
#ifndef ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_
#define ZEPHYR_DRIVERS_SERIAL_UART_STM32_H_
#include <drivers/pinmux.h>
#include <drivers/pinctrl.h>
/* device config */
struct uart_stm32_config {
@ -23,8 +23,7 @@ struct uart_stm32_config {
bool hw_flow_control;
/* initial parity, 0 for none, 1 for odd, 2 for even */
int parity;
const struct soc_gpio_pinctrl *pinctrl_list;
size_t pinctrl_list_size;
const struct pinctrl_dev_config *pcfg;
#if defined(CONFIG_PM) \
&& !defined(CONFIG_UART_INTERRUPT_DRIVEN) \
&& !defined(CONFIG_UART_ASYNC_API)

12
dts/bindings/serial/st,stm32-lpuart.yaml
View file

@ -2,7 +2,7 @@ description: STM32 LPUART
compatible: "st,stm32-lpuart"
include: uart-controller.yaml
include: [uart-controller.yaml, pinctrl-device.yaml]
properties:
reg:
@ -13,13 +13,3 @@ properties:
clocks:
required: true
pinctrl-0:
type: phandles
required: false
description: |
GPIO pin configuration for serial signals (RX, TX, RTS, CTS). We expect
that the phandles will reference pinctrl nodes.
For example the USART1 would be
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;

12
dts/bindings/serial/st,stm32-uart.yaml
View file

@ -2,7 +2,7 @@ description: STM32 UART
compatible: "st,stm32-uart"
include: uart-controller.yaml
include: [uart-controller.yaml, pinctrl-device.yaml]
properties:
reg:
@ -10,13 +10,3 @@ properties:
interrupts:
required: true
pinctrl-0:
type: phandles
required: false
description: |
GPIO pin configuration for serial signals (RX, TX, RTS, CTS). We expect
that the phandles will reference pinctrl nodes.
For example the USART1 would be
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;

12
dts/bindings/serial/st,stm32-usart.yaml
View file

@ -2,7 +2,7 @@ description: STM32 USART
compatible: "st,stm32-usart"
include: uart-controller.yaml
include: [uart-controller.yaml, pinctrl-device.yaml]
properties:
reg:
@ -10,13 +10,3 @@ properties:
interrupts:
required: true
pinctrl-0:
type: phandles
required: false
description: |
GPIO pin configuration for serial signals (RX, TX, RTS, CTS). We expect
that the phandles will reference pinctrl nodes.
For example the USART1 would be
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;