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drivers: gpio: nrfx: add custom drive flags

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Now that we have 8 bits reserved for vendor specific GPIO flags,
introduce a new set of flags for nRF platforms to configure pins drive
mode. These new flags are equivalent to the previous existing ones, but
use a naming scheme the fits better with vendor hardware capabilities.

The table below shows the equivalence between old and new flag

| Old flags                 | New flags             |
|---------------------------|-----------------------|
| `NRF_GPIO_DS_DFLT_LOW`    | `NRF_GPIO_DRIVE_S0`   |
| `NRF_GPIO_DS_DFLT_HIGH`   | `NRF_GPIO_DRIVE_S1`   |
| `NRF_GPIO_DS_ALT_LOW`     | `NRF_GPIO_DRIVE_H0`   |
| `NRF_GPIO_DS_ALT_HIGH`    | `NRF_GPIO_DRIVE_H1`   |
| `NRF_GPIO_DS_DFLT`        | `NRF_GPIO_DRIVE_S0S1` |
| `NRF_GPIO_DS_ALT`         | `NRF_GPIO_DRIVE_H0H1` |
| `NRF_GPIO_DS_DFLT_LOW \|` | `NRF_GPIO_DRIVE_S0H1` |
| `NRF_GPIO_DS_ALT_HIGH`    |                       |
| `NRF_GPIO_DS_ALT_LOW \|`  | `NRF_GPIO_DRIVE_H0S1` |
| `NRF_GPIO_DS_DFLT_HIGH`   |                       |

Documentation has been written to explain in more detail the meaning of
the flags and how they can be used.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2022-07-07 19:24:01 +02:00 committed by Carles Cufí
parent e29055a225
commit 2533b13cd2
2 changed files with 91 additions and 8 deletions
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34
drivers/gpio/gpio_nrfx.c
View file

@ -8,6 +8,7 @@
#include <nrfx_gpiote.h>
#include <string.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/dt-bindings/gpio/nordic-nrf-gpio.h>
#include "gpio_utils.h"
struct gpio_nrfx_data {
@ -36,16 +37,33 @@ static inline const struct gpio_nrfx_cfg *get_port_cfg(const struct device *port
static int get_drive(gpio_flags_t flags, nrf_gpio_pin_drive_t *drive)
{
switch (flags & GPIO_OPEN_DRAIN) {
case GPIO_OPEN_DRAIN:
*drive = NRF_GPIO_PIN_S0D1;
break;
case GPIO_OPEN_SOURCE:
*drive = NRF_GPIO_PIN_D0S1;
break;
default:
switch (flags & (NRF_GPIO_DRIVE_MSK | GPIO_OPEN_DRAIN)) {
case NRF_GPIO_DRIVE_S0S1:
*drive = NRF_GPIO_PIN_S0S1;
break;
case NRF_GPIO_DRIVE_S0H1:
*drive = NRF_GPIO_PIN_S0H1;
break;
case NRF_GPIO_DRIVE_H0S1:
*drive = NRF_GPIO_PIN_H0S1;
break;
case NRF_GPIO_DRIVE_H0H1:
*drive = NRF_GPIO_PIN_H0H1;
break;
case NRF_GPIO_DRIVE_S0 | GPIO_OPEN_DRAIN:
*drive = NRF_GPIO_PIN_S0D1;
break;
case NRF_GPIO_DRIVE_H0 | GPIO_OPEN_DRAIN:
*drive = NRF_GPIO_PIN_H0D1;
break;
case NRF_GPIO_DRIVE_S1 | GPIO_OPEN_SOURCE:
*drive = NRF_GPIO_PIN_D0S1;
break;
case NRF_GPIO_DRIVE_H1 | GPIO_OPEN_SOURCE:
*drive = NRF_GPIO_PIN_D0H1;
break;
default:
return -EINVAL;
}
return 0;

65
include/zephyr/dt-bindings/gpio/nordic-nrf-gpio.h Normal file
View file

@ -0,0 +1,65 @@
/*
* Copyright (c) 2022 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_NORDIC_NRF_GPIO_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_NORDIC_NRF_GPIO_H_
/**
* @brief nRF-specific GPIO Flags
* @defgroup gpio_interface_nrf nRF-specific GPIO Flags
* @ingroup gpio_interface
* @{
*/
/**
* @name nRF GPIO drive flags
* @brief nRF GPIO drive flags
*
* Standard (S) or High (H) drive modes can be applied to both pin levels, 0 or
* 1. High drive mode will increase current capabilities of the pin (refer to
* each SoC reference manual).
*
* When the pin is configured to operate in open-drain mode (wired-and), the
* drive mode can only be selected for the 0 level (1 is disconnected).
* Similarly, when the pin is configured to operate in open-source mode
* (wired-or), the drive mode can only be set for the 1 level
* (0 is disconnected).
*
* The drive flags are encoded in the 8 upper bits of @ref gpio_dt_flags_t as
* follows:
*
* - Bit 8: Drive mode for '0' (0=Standard, 1=High)
* - Bit 9: Drive mode for '1' (0=Standard, 1=High)
*
* @{
*/
/** @cond INTERNAL_HIDDEN */
/** Drive mode field mask */
#define NRF_GPIO_DRIVE_MSK 0x0300U
/** @endcond */
/** Standard drive for '0' (default, used with GPIO_OPEN_DRAIN) */
#define NRF_GPIO_DRIVE_S0 (0U << 8U)
/** High drive for '0' (used with GPIO_OPEN_DRAIN) */
#define NRF_GPIO_DRIVE_H0 (1U << 8U)
/** Standard drive for '1' (default, used with GPIO_OPEN_SOURCE) */
#define NRF_GPIO_DRIVE_S1 (0U << 9U)
/** High drive for '1' (used with GPIO_OPEN_SOURCE) */
#define NRF_GPIO_DRIVE_H1 (1U << 9U)
/** Standard drive for '0' and '1' (default) */
#define NRF_GPIO_DRIVE_S0S1 (NRF_GPIO_DRIVE_S0 | NRF_GPIO_DRIVE_S1)
/** Standard drive for '0' and high for '1' */
#define NRF_GPIO_DRIVE_S0H1 (NRF_GPIO_DRIVE_S0 | NRF_GPIO_DRIVE_H1)
/** High drive for '0' and standard for '1' */
#define NRF_GPIO_DRIVE_H0S1 (NRF_GPIO_DRIVE_H0 | NRF_GPIO_DRIVE_S1)
/** High drive for '0' and '1' */
#define NRF_GPIO_DRIVE_H0H1 (NRF_GPIO_DRIVE_H0 | NRF_GPIO_DRIVE_H1)
/** @} */
/** @} */
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_NORDIC_NRF_GPIO_H_ */