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serial/ns16550: reduce number of kconfig options

Browse source 
Moves those kconfig options which should be declared in
SoC or board header files instead. These are the one
that are tied to SoC or board and there is no need
for them to be configurable in kconfig.

Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2016-03-29 11:01:11 -07:00 committed by Anas Nashif
parent 808b4c6230
commit 26b474c987
18 changed files with 114 additions and 324 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

12
arch/arc/soc/quark_se_ss/Kconfig.defconfig
View file

@ -134,16 +134,10 @@ if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0xB0002000
config UART_NS16550_PORT_0_IRQ
default 41
config UART_NS16550_PORT_0_IRQ_PRI
default 1
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 32000000
config UART_NS16550_PORT_0_OPTIONS
default 0
@ -156,16 +150,10 @@ if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0xB0002400
config UART_NS16550_PORT_1_IRQ
default 42
config UART_NS16550_PORT_1_IRQ_PRI
default 1
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 32000000
config UART_NS16550_PORT_1_OPTIONS
default 0

11
arch/arc/soc/quark_se_ss/soc.h
View file

@ -154,8 +154,15 @@
/*
* UART
*/
#define UART_NS16550_0_INT_MASK 0x460
#define UART_NS16550_1_INT_MASK 0x464
#define UART_NS16550_PORT_0_BASE_ADDR 0xB0002000
#define UART_NS16550_PORT_0_IRQ 41
#define UART_NS16550_PORT_0_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
#define UART_NS16550_PORT_0_INT_MASK 0x460
#define UART_NS16550_PORT_1_BASE_ADDR 0xB0002400
#define UART_NS16550_PORT_1_IRQ 42
#define UART_NS16550_PORT_1_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
#define UART_NS16550_PORT_1_INT_MASK 0x464
/*
* SPI

4
arch/arc/soc/quark_se_ss/soc_config.c
View file

@ -59,12 +59,12 @@ static int uart_ns16550_init(struct device *dev)
ARG_UNUSED(dev);
#ifdef CONFIG_UART_NS16550_PORT_0
sys_clear_bit((SCSS_REGISTER_BASE + UART_NS16550_0_INT_MASK),
sys_clear_bit((SCSS_REGISTER_BASE + UART_NS16550_PORT_0_INT_MASK),
INT_ENABLE_ARC_BIT_POS);
#endif /* CONFIG_UART_NS16550_PORT_0 */
#ifdef CONFIG_UART_NS16550_PORT_1
sys_clear_bit((SCSS_REGISTER_BASE + UART_NS16550_1_INT_MASK),
sys_clear_bit((SCSS_REGISTER_BASE + UART_NS16550_PORT_1_INT_MASK),
INT_ENABLE_ARC_BIT_POS);
#endif /* CONFIG_UART_NS16550_PORT_1 */

12
arch/x86/soc/atom/Kconfig.defconfig
View file

@ -53,16 +53,10 @@ if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0x03F8
config UART_NS16550_PORT_0_IRQ
default 4
config UART_NS16550_PORT_0_IRQ_PRI
default 3
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 1843200
config UART_NS16550_PORT_0_OPTIONS
default 0
@ -75,16 +69,10 @@ if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0x02F8
config UART_NS16550_PORT_1_IRQ
default 3
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 1843200
config UART_NS16550_PORT_1_OPTIONS
default 0

14
arch/x86/soc/atom/soc.h
View file

@ -47,4 +47,18 @@
#define INT_VEC_IRQ0 0x20 /* vector number for IRQ0 */
/*
* UART
*/
#define UART_NS16550_ACCESS_IOPORT
#define UART_NS16550_PORT_0_BASE_ADDR 0x03F8
#define UART_NS16550_PORT_0_IRQ 4
#define UART_NS16550_PORT_0_CLK_FREQ 1843200
#define UART_NS16550_PORT_1_BASE_ADDR 0x02F8
#define UART_NS16550_PORT_1_IRQ 3
#define UART_NS16550_PORT_1_CLK_FREQ 1843200
#endif /* __SOC_H_ */

12
arch/x86/soc/ia32/Kconfig.defconfig
View file

@ -53,16 +53,10 @@ if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0x03F8
config UART_NS16550_PORT_0_IRQ
default 4
config UART_NS16550_PORT_0_IRQ_PRI
default 3
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 1843200
config UART_NS16550_PORT_0_OPTIONS
default 0
@ -75,16 +69,10 @@ if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0x02F8
config UART_NS16550_PORT_1_IRQ
default 3
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 1843200
config UART_NS16550_PORT_1_OPTIONS
default 0

13
arch/x86/soc/ia32/soc.h
View file

@ -45,6 +45,19 @@
#endif
#endif /* CONFIG_IOAPIC */
/*
* UART
*/
#define UART_NS16550_ACCESS_IOPORT
#define UART_NS16550_PORT_0_BASE_ADDR 0x03F8
#define UART_NS16550_PORT_0_IRQ 4
#define UART_NS16550_PORT_0_CLK_FREQ 1843200
#define UART_NS16550_PORT_1_BASE_ADDR 0x02F8
#define UART_NS16550_PORT_1_IRQ 3
#define UART_NS16550_PORT_1_CLK_FREQ 1843200
#define INT_VEC_IRQ0 0x20 /* Vector number for IRQ0 */
/* PCI definitions */
#define PCI_BUS_NUMBERS 1

12
arch/x86/soc/quark_d2000/Kconfig.defconfig
View file

@ -64,16 +64,10 @@ if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0xB0002000
config UART_NS16550_PORT_0_IRQ
default 8
config UART_NS16550_PORT_0_IRQ_PRI
default 3
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 32000000
config UART_NS16550_PORT_0_OPTIONS
default 0
config UART_NS16550_PORT_0_DLF
@ -88,16 +82,10 @@ if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0xB0002400
config UART_NS16550_PORT_1_IRQ
default 6
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 32000000
config UART_NS16550_PORT_1_OPTIONS
default 0
config UART_NS16550_PORT_1_DLF

11
arch/x86/soc/quark_d2000/soc.h
View file

@ -152,4 +152,15 @@ struct scss_interrupt {
#endif /* CONFIG_PINMUX */
/*
* UART
*/
#define UART_NS16550_PORT_0_BASE_ADDR 0xB0002000
#define UART_NS16550_PORT_0_IRQ 8
#define UART_NS16550_PORT_0_CLK_FREQ MHZ(32)
#define UART_NS16550_PORT_1_BASE_ADDR 0xB0002400
#define UART_NS16550_PORT_1_IRQ 6
#define UART_NS16550_PORT_1_CLK_FREQ MHZ(32)
#endif /* __SOC_H_ */

12
arch/x86/soc/quark_se/Kconfig.defconfig
View file

@ -378,16 +378,10 @@ if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0xB0002000
config UART_NS16550_PORT_0_IRQ
default 5
config UART_NS16550_PORT_0_IRQ_PRI
default 3
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 32000000
config UART_NS16550_PORT_0_OPTIONS
default 0
@ -400,16 +394,10 @@ if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0xB0002400
config UART_NS16550_PORT_1_IRQ
default 6
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 32000000
config UART_NS16550_PORT_1_OPTIONS
default 0

11
arch/x86/soc/quark_se/soc.h
View file

@ -197,6 +197,17 @@ struct scss_interrupt {
#endif
/*
* UART
*/
#define UART_NS16550_PORT_0_BASE_ADDR 0xB0002000
#define UART_NS16550_PORT_0_IRQ 5
#define UART_NS16550_PORT_0_CLK_FREQ MHZ(32)
#define UART_NS16550_PORT_1_BASE_ADDR 0xB0002400
#define UART_NS16550_PORT_1_IRQ 6
#define UART_NS16550_PORT_1_CLK_FREQ MHZ(32)
#endif /* _ASMLANGUAGE */
#endif /* __SOC_H_ */

40
arch/x86/soc/quark_x1000/Kconfig.defconfig
View file

@ -275,34 +275,14 @@ if UART_NS16550_PORT_0
config UART_NS16550_PORT_0_NAME
default "UART_0"
config UART_NS16550_PORT_0_BASE_ADDR
default 0x9000f000
config UART_NS16550_PORT_0_IRQ
default 0
config UART_NS16550_PORT_0_IRQ_PRI
default 0
config UART_NS16550_PORT_0_BAUD_RATE
default 115200
config UART_NS16550_PORT_0_CLK_FREQ
default 44236800
config UART_NS16550_PORT_0_OPTIONS
default 0
config UART_NS16550_PORT_0_PCI
def_bool y if UART_NS16550_PCI
config UART_NS16550_PORT_0_PCI_CLASS
default 0x07
config UART_NS16550_PORT_0_PCI_BUS
default 0
config UART_NS16550_PORT_0_PCI_DEV
default 20
config UART_NS16550_PORT_0_PCI_VENDOR_ID
default 0x8086
config UART_NS16550_PORT_0_PCI_DEVICE_ID
default 0x0936
config UART_NS16550_PORT_0_PCI_FUNC
default 1
config UART_NS16550_PORT_0_PCI_BAR
default 0
endif # UART_NS16550_PORT_0
@ -313,34 +293,14 @@ if UART_NS16550_PORT_1
config UART_NS16550_PORT_1_NAME
default "UART_1"
config UART_NS16550_PORT_1_BASE_ADDR
default 0x9000b000
config UART_NS16550_PORT_1_IRQ
default 17
config UART_NS16550_PORT_1_IRQ_PRI
default 3
config UART_NS16550_PORT_1_BAUD_RATE
default 115200
config UART_NS16550_PORT_1_CLK_FREQ
default 44236800
config UART_NS16550_PORT_1_OPTIONS
default 0
config UART_NS16550_PORT_1_PCI
def_bool y if UART_NS16550_PCI
config UART_NS16550_PORT_1_PCI_CLASS
default 0x07
config UART_NS16550_PORT_1_PCI_BUS
default 0
config UART_NS16550_PORT_1_PCI_DEV
default 20
config UART_NS16550_PORT_1_PCI_VENDOR_ID
default 0x8086
config UART_NS16550_PORT_1_PCI_DEVICE_ID
default 0x0936
config UART_NS16550_PORT_1_PCI_FUNC
default 5
config UART_NS16550_PORT_1_PCI_BAR
default 0
endif # UART_NS16550_PORT_1

28
arch/x86/soc/quark_x1000/soc.h
View file

@ -45,6 +45,34 @@
#endif
#endif /* CONFIG_IOAPIC */
/*
* UART
*/
#define UART_NS16550_PORT_0_BASE_ADDR 0x9000f000
#define UART_NS16550_PORT_0_IRQ 0
#define UART_NS16550_PORT_0_CLK_FREQ 44236800
#define UART_NS16550_PORT_0_PCI_CLASS 0x07
#define UART_NS16550_PORT_0_PCI_BUS 0
#define UART_NS16550_PORT_0_PCI_DEV 20
#define UART_NS16550_PORT_0_PCI_VENDOR_ID 0x8086
#define UART_NS16550_PORT_0_PCI_DEVICE_ID 0x0936
#define UART_NS16550_PORT_0_PCI_FUNC 1
#define UART_NS16550_PORT_0_PCI_BAR 0
#define UART_NS16550_PORT_1_BASE_ADDR 0x9000b000
#define UART_NS16550_PORT_1_IRQ 17
#define UART_NS16550_PORT_1_CLK_FREQ 44236800
#define UART_NS16550_PORT_1_PCI_CLASS 0x07
#define UART_NS16550_PORT_1_PCI_BUS 0
#define UART_NS16550_PORT_1_PCI_DEV 20
#define UART_NS16550_PORT_1_PCI_VENDOR_ID 0x8086
#define UART_NS16550_PORT_1_PCI_DEVICE_ID 0x0936
#define UART_NS16550_PORT_1_PCI_FUNC 5
#define UART_NS16550_PORT_1_PCI_BAR 0
#ifdef __cplusplus
extern "C" {
#endif

1
boards/minnowboard/minnowboard_defconfig
View file

@ -14,5 +14,4 @@ CONFIG_SERIAL=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
CONFIG_UART_NS16550_ACCESS_IOPORT=y

1
boards/qemu_x86/qemu_x86_defconfig
View file

@ -14,4 +14,3 @@ CONFIG_SERIAL=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
CONFIG_UART_NS16550_ACCESS_IOPORT=y

1
boards/qemu_x86/qemu_x86_iamcu_defconfig
View file

@ -15,6 +15,5 @@ CONFIG_SERIAL=y
CONFIG_UART_NS16550=y
CONFIG_UART_CONSOLE=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=25000000
CONFIG_UART_NS16550_ACCESS_IOPORT=y
CONFIG_TOOLCHAIN_VARIANT="iamcu"
CONFIG_X86_IAMCU=y

191
drivers/serial/Kconfig.ns16550
View file

@ -17,30 +17,10 @@ config UART_NS16550_PCI
This option enables the driver to auto-detect the device
configuration required to access those ports.
choice
prompt "Controller Registers Access Method"
depends on UART_NS16550
default UART_NS16550_ACCESS_IOPORT if SOC_IA32
default UART_NS16550_ACCESS_MMIO
config UART_NS16550_ACCESS_MMIO
bool "Memory mapped I/O"
help
The UART controller is mapped to memory space, and can be directly
access through memory manipulation.
config UART_NS16550_ACCESS_IOPORT
bool "I/O Port"
depends on !UART_NS16550_PCI
help
The UART controller is accessed through I/O port.
endchoice
config UART_NS16550_DLF
bool "Enable Divisor Latch Fraction (DLF) support"
default n
depends on UART_NS16550 && UART_NS16550_ACCESS_MMIO
depends on UART_NS16550
help
This enables support for divisor latch fraction (DLF).
It is used to limit frequency error.
@ -84,29 +64,6 @@ config UART_NS16550_PORT_0_NAME
This is the device name for UART, and is included in the device
struct.
config UART_NS16550_PORT_0_BASE_ADDR
hex "Port 0 Base Address or I/O Port"
default 0x00000000
depends on UART_NS16550_PORT_0
help
The base address of UART port.
Leave this at 0x00000000 to skip initialization at boot.
For PCI device, this value is from PCI configuration space, so just
leave it at 0x00000000.
config UART_NS16550_PORT_0_IRQ
int "Port 0 Interrupt Vector"
default 0
depends on UART_NS16550_PORT_0
help
The interrupt vector for UART port. This is used for interrupt driven
transfers.
For PCI device, this value is from PCI configuration space, so just
leave it at 0x00.
config UART_NS16550_PORT_0_IRQ_PRI
int "Port 0 Interrupt Priority"
default 0
@ -123,13 +80,6 @@ config UART_NS16550_PORT_0_BAUD_RATE
Leave at 0 to skip initialization.
config UART_NS16550_PORT_0_CLK_FREQ
int "Port 0 Clock Frequency"
default 0
depends on UART_NS16550_PORT_0
help
The clock frequency for UART port.
config UART_NS16550_PORT_0_OPTIONS
int "Port 0 Options"
default 0
@ -151,57 +101,6 @@ config UART_NS16550_PORT_0_PCI
help
Obtain port information from PCI.
config UART_NS16550_PORT_0_PCI_CLASS
hex "Port 0 PCI Class"
default 0x07
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
Value 0x07 is for simple communication controllers.
config UART_NS16550_PORT_0_PCI_BUS
int "Port 0 PCI Bus Number"
default 0
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_DEV
int "Port 0 PCI Device Number"
default 0
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_VENDOR_ID
hex "Port 0 PCI Vendor ID"
default 0x0000
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_DEVICE_ID
hex "Port 0 PCI Device ID"
default 0x0000
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_FUNC
int "Port 0 PCI Function"
default 0
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_0_PCI_BAR
int "Port 0 PCI BAR"
default 0
depends on UART_NS16550_PORT_0_PCI
help
Needed for PCI based UART port.
# ---------- Port 1 ----------
menuconfig UART_NS16550_PORT_1
@ -220,29 +119,6 @@ config UART_NS16550_PORT_1_NAME
This is the device name for UART, and is included in the device
struct.
config UART_NS16550_PORT_1_BASE_ADDR
hex "Port 1 Base Address or I/O Port"
default 0x00000000
depends on UART_NS16550_PORT_1
help
The base address of UART port.
Leave this at 0x00000000 to skip initialization at boot.
For PCI device, this value is from PCI configuration space, so just
leave it at 0x00000000.
config UART_NS16550_PORT_1_IRQ
int "Port 1 Interrupt Vector"
default 0
depends on UART_NS16550_PORT_1
help
The interrupt vector for UART port. This is used for interrupt driven
transfers.
For PCI device, this value is from PCI configuration space, so just
leave it at 0x00.
config UART_NS16550_PORT_1_IRQ_PRI
int "Port 1 Interrupt Priority"
default 0
@ -259,13 +135,6 @@ config UART_NS16550_PORT_1_BAUD_RATE
Leave at 0 to skip initialization.
config UART_NS16550_PORT_1_CLK_FREQ
int "Port 1 Clock Frequency"
default 0
depends on UART_NS16550_PORT_1
help
The clock frequency for UART port.
config UART_NS16550_PORT_1_OPTIONS
int "Port 1 Options"
default 0
@ -279,61 +148,3 @@ config UART_NS16550_PORT_1_DLF
depends on UART_NS16550_PORT_1 && UART_NS16550_DLF
help
Value for DLF register.
config UART_NS16550_PORT_1_PCI
bool "Port 1 is PCI-based"
default n
depends on UART_NS16550_PCI && UART_NS16550_PORT_1
help
Obtain port information from PCI.
config UART_NS16550_PORT_1_PCI_CLASS
hex "Port 1 PCI Class"
default 0x07
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
Value 0x07 is for simple communication controllers.
config UART_NS16550_PORT_1_PCI_BUS
int "Port 1 PCI Bus Number"
default 0
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_DEV
int "Port 1 PCI Device Number"
default 0
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_VENDOR_ID
hex "Port 1 PCI Vendor ID"
default 0x0000
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_DEVICE_ID
hex "Port 1 PCI Device ID"
default 0x0000
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_FUNC
int "Port 1 PCI Function"
default 0
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.
config UART_NS16550_PORT_1_PCI_BAR
int "Port 1 PCI BAR"
default 0
depends on UART_NS16550_PORT_1_PCI
help
Needed for PCI based UART port.

52
drivers/serial/uart_ns16550.c
View file

@ -193,17 +193,15 @@
#define IIRC(dev) (DEV_DATA(dev)->iir_cache)
#ifdef CONFIG_UART_NS16550_ACCESS_IOPORT
#ifdef UART_NS16550_ACCESS_IOPORT
#define INBYTE(x) sys_in8(x)
#define OUTBYTE(x, d) sys_out8(d, x)
#define UART_REG_ADDR_INTERVAL 1 /* address diff of adjacent regs. */
#endif /* CONFIG_UART_NS16550_ACCESS_IOPORT */
#ifdef CONFIG_UART_NS16550_ACCESS_MMIO
#else
#define INBYTE(x) sys_read8(x)
#define OUTBYTE(x, d) sys_write8(d, x)
#define UART_REG_ADDR_INTERVAL 4 /* address diff of adjacent regs. */
#endif /* CONFIG_UART_NS16550_ACCESS_MMIO */
#endif /* UART_NS16550_ACCESS_IOPORT */
/** Device data structure */
struct uart_ns16550_dev_data_t {
@ -733,17 +731,17 @@ static void irq_config_func_0(struct device *port);
#endif
struct uart_device_config uart_ns16550_dev_cfg_0 = {
.port = CONFIG_UART_NS16550_PORT_0_BASE_ADDR,
.sys_clk_freq = CONFIG_UART_NS16550_PORT_0_CLK_FREQ,
.port = UART_NS16550_PORT_0_BASE_ADDR,
.sys_clk_freq = UART_NS16550_PORT_0_CLK_FREQ,
#ifdef CONFIG_UART_NS16550_PORT_0_PCI
.pci_dev.class_type = CONFIG_UART_NS16550_PORT_0_PCI_CLASS,
.pci_dev.bus = CONFIG_UART_NS16550_PORT_0_PCI_BUS,
.pci_dev.dev = CONFIG_UART_NS16550_PORT_0_PCI_DEV,
.pci_dev.vendor_id = CONFIG_UART_NS16550_PORT_0_PCI_VENDOR_ID,
.pci_dev.device_id = CONFIG_UART_NS16550_PORT_0_PCI_DEVICE_ID,
.pci_dev.function = CONFIG_UART_NS16550_PORT_0_PCI_FUNC,
.pci_dev.bar = CONFIG_UART_NS16550_PORT_0_PCI_BAR,
.pci_dev.class_type = UART_NS16550_PORT_0_PCI_CLASS,
.pci_dev.bus = UART_NS16550_PORT_0_PCI_BUS,
.pci_dev.dev = UART_NS16550_PORT_0_PCI_DEV,
.pci_dev.vendor_id = UART_NS16550_PORT_0_PCI_VENDOR_ID,
.pci_dev.device_id = UART_NS16550_PORT_0_PCI_DEVICE_ID,
.pci_dev.function = UART_NS16550_PORT_0_PCI_FUNC,
.pci_dev.bar = UART_NS16550_PORT_0_PCI_BAR,
#endif /* CONFIG_UART_NS16550_PORT_0_PCI */
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
@ -767,11 +765,11 @@ DEVICE_INIT(uart_ns16550_0, CONFIG_UART_NS16550_PORT_0_NAME, &uart_ns16550_init,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_0(struct device *dev)
{
IRQ_CONNECT(CONFIG_UART_NS16550_PORT_0_IRQ,
IRQ_CONNECT(UART_NS16550_PORT_0_IRQ,
CONFIG_UART_NS16550_PORT_0_IRQ_PRI,
uart_ns16550_isr, DEVICE_GET(uart_ns16550_0),
UART_IRQ_FLAGS);
irq_enable(CONFIG_UART_NS16550_PORT_0_IRQ);
irq_enable(UART_NS16550_PORT_0_IRQ);
}
#endif
@ -784,17 +782,17 @@ static void irq_config_func_1(struct device *port);
#endif
struct uart_device_config uart_ns16550_dev_cfg_1 = {
.port = CONFIG_UART_NS16550_PORT_1_BASE_ADDR,
.sys_clk_freq = CONFIG_UART_NS16550_PORT_1_CLK_FREQ,
.port = UART_NS16550_PORT_1_BASE_ADDR,
.sys_clk_freq = UART_NS16550_PORT_1_CLK_FREQ,
#ifdef CONFIG_UART_NS16550_PORT_1_PCI
.pci_dev.class_type = CONFIG_UART_NS16550_PORT_1_PCI_CLASS,
.pci_dev.bus = CONFIG_UART_NS16550_PORT_1_PCI_BUS,
.pci_dev.dev = CONFIG_UART_NS16550_PORT_1_PCI_DEV,
.pci_dev.vendor_id = CONFIG_UART_NS16550_PORT_1_PCI_VENDOR_ID,
.pci_dev.device_id = CONFIG_UART_NS16550_PORT_1_PCI_DEVICE_ID,
.pci_dev.function = CONFIG_UART_NS16550_PORT_1_PCI_FUNC,
.pci_dev.bar = CONFIG_UART_NS16550_PORT_1_PCI_BAR,
.pci_dev.class_type = UART_NS16550_PORT_1_PCI_CLASS,
.pci_dev.bus = UART_NS16550_PORT_1_PCI_BUS,
.pci_dev.dev = UART_NS16550_PORT_1_PCI_DEV,
.pci_dev.vendor_id = UART_NS16550_PORT_1_PCI_VENDOR_ID,
.pci_dev.device_id = UART_NS16550_PORT_1_PCI_DEVICE_ID,
.pci_dev.function = UART_NS16550_PORT_1_PCI_FUNC,
.pci_dev.bar = UART_NS16550_PORT_1_PCI_BAR,
#endif /* CONFIG_UART_NS16550_PORT_1_PCI */
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
@ -818,11 +816,11 @@ DEVICE_INIT(uart_ns16550_1, CONFIG_UART_NS16550_PORT_1_NAME, &uart_ns16550_init,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void irq_config_func_1(struct device *dev)
{
IRQ_CONNECT(CONFIG_UART_NS16550_PORT_1_IRQ,
IRQ_CONNECT(UART_NS16550_PORT_1_IRQ,
CONFIG_UART_NS16550_PORT_1_IRQ_PRI,
uart_ns16550_isr, DEVICE_GET(uart_ns16550_1),
UART_IRQ_FLAGS);
irq_enable(CONFIG_UART_NS16550_PORT_1_IRQ);
irq_enable(UART_NS16550_PORT_1_IRQ);
}
#endif