soc/intel_adsp: Build bootloader with Zephyr
The presence of a separate build for the bootloader code has always been a wart with this platform. Sharing of code between the two has required great care. We've had bugs with mismatched include paths, macro definitions and compiler flags, etc... And of course it's not possible for one to see the other; in theory we'd like the ability to call back into IMR code after startup, to use the space for temporary storage, etc... So let's finally do it. This really isn't that complicated when you see it in isolation: + Move the module manifest metadata into an "rimage_modules.c", and put them in their own NOLOAD section where we can grab them later with objcopy. + Make a new "imr" memory region in the main linker and just paste the bootloader linkage (which is now using its own specific sections) in there. + After zephyr.elf is built and cache-remapped, we can extract the imr sections and the appropriate manifest for the bootloader rimage module, and then do the converse by excluding them for the main image module. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This commit is contained in:
Andy Ross
Maureen Helm
parent
79746d701b
commit
2906d1aa51
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@ -423,8 +423,8 @@ class RimageSigner(Signer):
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out_xman = str(b / 'zephyr' / 'zephyr.ri.xman')
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out_tmp = str(b / 'zephyr' / 'zephyr.rix')
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else:
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bootloader = str(b / 'zephyr' / 'bootloader.elf.mod')
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kernel = str(b / 'zephyr' / 'zephyr.elf.mod')
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bootloader = str(b / 'zephyr' / 'boot.mod')
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kernel = str(b / 'zephyr' / 'main.mod')
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out_bin = str(b / 'zephyr' / 'zephyr.ri')
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out_xman = str(b / 'zephyr' / 'zephyr.ri.xman')
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out_tmp = str(b / 'zephyr' / 'zephyr.rix')
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@ -15,16 +15,38 @@ zephyr_library_sources(adsp.c)
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zephyr_library_sources(soc.c)
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zephyr_library_sources(soc_mp.c)
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zephyr_library_sources(trace_out.c)
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zephyr_library_sources(rimage_modules.c)
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zephyr_library_sources(bootloader/boot_loader.c)
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zephyr_library_link_libraries(INTEL_ADSP_COMMON)
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target_include_directories(INTEL_ADSP_COMMON INTERFACE include)
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target_link_libraries(INTEL_ADSP_COMMON INTERFACE intel_adsp_common)
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# Common CAVS code
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if(CONFIG_SOC_SERIES_INTEL_CAVS_V15 OR
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CONFIG_SOC_SERIES_INTEL_CAVS_V18 OR
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CONFIG_SOC_SERIES_INTEL_CAVS_V20 OR
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CONFIG_SOC_SERIES_INTEL_CAVS_V25)
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include(bootloader.cmake)
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endif()
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set(ELF_FIX ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/fix_elf_addrs.py)
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set(KERNEL_REMAPPED ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_NAME}-remapped.elf)
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# Generate rimage modules from the base kernel ELF file
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add_custom_target(
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gen_modules ALL
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DEPENDS ${ZEPHYR_FINAL_EXECUTABLE}
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# Remap uncached section addresses so they appear contiguous
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COMMAND ${CMAKE_COMMAND} -E
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copy ${CMAKE_BINARY_DIR}/zephyr/${KERNEL_NAME}.elf ${KERNEL_REMAPPED}
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COMMAND ${ELF_FIX} ${CMAKE_OBJCOPY} ${KERNEL_REMAPPED}
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# Extract modules for rimage
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COMMAND ${CMAKE_OBJCOPY}
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--only-section .imr*
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--only-section .module.boot
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--rename-section .module.boot=.module
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${KERNEL_REMAPPED} ${CMAKE_BINARY_DIR}/zephyr/boot.mod
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COMMAND ${CMAKE_OBJCOPY}
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--remove-section .imr*
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--remove-section .module.boot
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--rename-section .module.main=.module
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${KERNEL_REMAPPED} ${CMAKE_BINARY_DIR}/zephyr/main.mod
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)
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@ -26,6 +26,11 @@ OUTPUT_ARCH(xtensa)
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PROVIDE(__memctl_default = 0x00000000);
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PROVIDE(_MemErrorHandler = 0x00000000);
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/* Offset of the entry point from the manifest start in IMR. Magic
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* number must be synchronized with the module and rimage configuration!
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*/
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#define ENTRY_POINT_OFF 0x6000
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#define LP_SRAM_REGION lpram
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/* DSP RAM regions (all of them) are mapped twice on the DSP: once in
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@ -57,6 +62,9 @@ PROVIDE(_MemErrorHandler = 0x00000000);
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MEMORY
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{
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modules :
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org = 0x10000,
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len = 0x10000
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vector_memory_lit :
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org = XCHAL_MEMERROR_VECTOR_PADDR + MEM_ERROR_LIT_SIZE,
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len = MEM_ERROR_LIT_SIZE
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@ -120,6 +128,9 @@ MEMORY
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vector_double_text :
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org = XCHAL_DOUBLEEXC_VECTOR_PADDR_SRAM,
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len = MEM_VECT_TEXT_SIZE
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imr :
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org = CONFIG_IMR_MANIFEST_ADDR + ENTRY_POINT_OFF,
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len = 0x100000
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ram :
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org = RAM_BASE,
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len = RAM_SIZE
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@ -171,6 +182,7 @@ PHDRS
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vector_user_text_phdr PT_LOAD;
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vector_double_lit_phdr PT_LOAD;
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vector_double_text_phdr PT_LOAD;
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imr_phdr PT_LOAD;
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ram_phdr PT_LOAD;
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#ifdef CONFIG_KERNEL_COHERENCE
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ucram_phdr PT_LOAD;
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@ -178,6 +190,7 @@ PHDRS
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static_uuid_entries_phdr PT_NOTE;
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static_log_entries_phdr PT_NOTE;
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metadata_entries_phdr PT_NOTE;
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module_phdr PT_NOTE;
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}
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_rom_store_table = 0;
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PROVIDE(_memmap_vecbase_reset = XCHAL_VECBASE_RESET_PADDR_SRAM);
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@ -229,9 +242,29 @@ EXTERN(ext_man_cavs_config)
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SECTIONS
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{
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#include <linker/rel-sections.ld>
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/* Boot loader code in IMR memory */
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.imr : {
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/* Entry point MUST be here per external configuration */
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KEEP (*(.boot_entry.text))
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*(.imr .imr.*)
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} >imr :imr_phdr
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/* Boot loader data. Note that rimage seems to want this
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* page-aligned or it will throw an error, not sure why since all
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* the ROM cares about is a contiguous region. And it's
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* particularly infuriating as it precludes linker .rodata next to
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* .text.
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*/
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.imrdata : ALIGN(4096) {
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*(.imrdata .imrdata.*)
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} >imr :imr_phdr
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/* rimage module manifest headers */
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.module.boot : { KEEP(*(.module.boot)) } >modules :module_phdr
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.module.main : { KEEP(*(.module.main)) } >modules :module_phdr
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.MemoryExceptionVector.literal : ALIGN(4)
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{
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_MemoryExceptionVector_literal_start = ABSOLUTE(.);
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33
soc/xtensa/intel_adsp/common/rimage_modules.c
Normal file
33
soc/xtensa/intel_adsp/common/rimage_modules.c
Normal file
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@ -0,0 +1,33 @@
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#include "bootloader/manifest.h"
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#include <cavs-mem.h>
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/* These data structures define "module manifest" headers. They
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* aren't runtime data used by Zephyr, but instead act as input
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* parameters to rimage and later to the ROM loader on the DSP. As it
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* happens most of the data here is ignored by both layers, but it's
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* left unchanged for historical purposes.
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*/
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__attribute__((section(".module.boot")))
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struct sof_man_module_manifest boot_manifest =
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{ .module = {
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.name = "BRNGUP",
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.uuid = { 0xcc, 0x48, 0x7b, 0x0d, 0xa9, 0x1e, 0x0a, 0x47,
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0xa8, 0xc1, 0x53, 0x34, 0x24, 0x52, 0x8a, 0x17 },
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.entry_point = IMR_BOOT_LDR_TEXT_ENTRY_BASE,
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.type = { .load_type = SOF_MAN_MOD_TYPE_MODULE,
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.domain_ll = 1, },
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.affinity_mask = 3,
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}};
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__attribute__((section(".module.main")))
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struct sof_man_module_manifest main_manifest =
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{ .module = {
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.name = "BASEFW",
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.uuid = { 0x2e, 0x9e, 0x86, 0xfc, 0xf8, 0x45, 0x45, 0x40,
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0xa4, 0x16, 0x89, 0x88, 0x0a, 0xe3, 0x20, 0xa9 },
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.entry_point = RAM_BASE,
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.type = { .load_type = SOF_MAN_MOD_TYPE_MODULE,
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.domain_ll = 1 },
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.affinity_mask = 3,
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}};
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