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arch: arm: cortex_m: Remove CPU_HAS_*CACHE from CPU_CORTEX_M7

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Caches are optional on cortex-m7, having CPU_HAS_*CACHE in CPU_CORTEX_M7
definition renders them mandatory.

Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
This commit is contained in:
Wilfried Chauveau 2023-11-05 04:09:36 +00:00 committed by Fabio Baltieri
parent 7226f985fc
commit 29ffaaa0b6
9 changed files with 52 additions and 2 deletions
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2
arch/arm/core/cortex_m/Kconfig
View file

@ -78,8 +78,6 @@ config CPU_CORTEX_M7
select CPU_CORTEX_M
select ARMV7_M_ARMV8_M_MAINLINE
select ARMV7_M_ARMV8_M_FP if CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
help
This option signifies the use of a Cortex-M7 CPU

2
soc/arm/atmel_sam/same70/Kconfig.series
View file

@ -11,6 +11,8 @@ config SOC_SERIES_SAME70
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_ARM_MPU
select CPU_HAS_FPU_DOUBLE_PRECISION
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select SOC_FAMILY_SAM
select PLATFORM_SPECIFIC_INIT
select ASF

2
soc/arm/atmel_sam/samv71/Kconfig.series
View file

@ -11,6 +11,8 @@ config SOC_SERIES_SAMV71
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_ARM_MPU
select CPU_HAS_FPU_DOUBLE_PRECISION
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select SOC_FAMILY_SAM
select PLATFORM_SPECIFIC_INIT
select ASF

2
soc/arm/nxp_imx/mimx8ml8_m7/Kconfig.series
View file

@ -9,6 +9,8 @@ config SOC_SERIES_IMX8ML_M7
select CPU_CORTEX_M7
select SOC_FAMILY_IMX
select CPU_HAS_FPU
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select INIT_VIDEO_PLL
help
Enable support for i.MX8ML M7 MCU series

8
soc/arm/nxp_imx/rt/Kconfig.soc
View file

@ -22,6 +22,8 @@ config SOC_MIMXRT1011
select HAS_MCUX_GPT
select HAS_MCUX_TRNG
select CPU_HAS_ARM_MPU
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select INIT_ENET_PLL
select HAS_MCUX_USB_EHCI
select HAS_MCUX_EDMA
@ -338,6 +340,8 @@ config SOC_MIMXRT1176_CM7
select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER
select INIT_VIDEO_PLL
select HAS_MCUX_EDMA
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
select BYPASS_LDO_LPSR
select ADJUST_LDO
@ -402,6 +406,8 @@ config SOC_MIMXRT1166_CM7
select HAS_MCUX_GPT
select HAS_MCUX_FLEXCAN
select CPU_HAS_ARM_MPU
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select INIT_ARM_PLL
select INIT_ENET_PLL if NET_L2_ETHERNET && ETH_DRIVER
select INIT_VIDEO_PLL
@ -659,6 +665,8 @@ config SOC_SERIES_IMX_RT10XX
bool "i.MX RT 10XX Series"
select CPU_CORTEX_M7
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select PLATFORM_SPECIFIC_INIT
config SOC_SERIES_IMX_RT11XX

2
soc/arm/nxp_kinetis/kv5x/Kconfig.series
View file

@ -11,6 +11,8 @@ config SOC_SERIES_KINETIS_KV5X
select SOC_FAMILY_KINETIS
select CPU_HAS_ARM_MPU
select CPU_HAS_FPU
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CLOCK_CONTROL
select HAS_MCUX
select HAS_MCUX_ADC16

2
soc/arm/nxp_s32/s32k3/Kconfig.series
View file

@ -11,6 +11,8 @@ config SOC_SERIES_S32K3XX
select HAS_NXP_S32_HAL
select CPU_HAS_FPU
select CPU_HAS_ARM_MPU
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
select PLATFORM_SPECIFIC_INIT if XIP
select USE_DT_CODE_PARTITION if XIP

2
soc/arm/st_stm32/stm32f7/Kconfig.series
View file

@ -9,6 +9,8 @@ config SOC_SERIES_STM32F7X
select CPU_CORTEX_M7
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select SOC_FAMILY_STM32
select HAS_STM32CUBE
select CPU_HAS_ARM_MPU

32
soc/arm/st_stm32/stm32h7/Kconfig.soc
View file

@ -16,81 +16,113 @@ choice
config SOC_STM32H723XX
bool "STM32H723XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H725XX
bool "STM32H725XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H730XX
bool "STM32H730XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H730XXQ
bool "STM32H730XXQ"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H735XX
bool "STM32H735XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H743XX
bool "STM32H743XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H745XX
bool "STM32H745XX"
select CPU_HAS_FPU_DOUBLE_PRECISION if CPU_CORTEX_M7
select CPU_HAS_ICACHE if CPU_CORTEX_M7
select CPU_HAS_DCACHE if CPU_CORTEX_M7
select STM32H7_DUAL_CORE
config SOC_STM32H747XX
bool "STM32H747XX"
select CPU_HAS_FPU_DOUBLE_PRECISION if CPU_CORTEX_M7
select CPU_HAS_ICACHE if CPU_CORTEX_M7
select CPU_HAS_DCACHE if CPU_CORTEX_M7
select STM32H7_DUAL_CORE
config SOC_STM32H750XX
bool "STM32H750XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H753XX
bool "STM32H753XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H7A3XX
bool "STM32H7A3XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H7A3XXQ
bool "STM32H7A3XXQ"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H7B0XX
bool "STM32H7B0XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H7B0XXQ
bool "STM32H7B0XXQ"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H7B3XX
bool "STM32H7B3XX"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
config SOC_STM32H7B3XXQ
bool "STM32H7B3XXQ"
select CPU_CORTEX_M7
select CPU_HAS_ICACHE
select CPU_HAS_DCACHE
select CPU_HAS_FPU_DOUBLE_PRECISION
endchoice