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gpio: Enable QMSI driver for Quark D2000

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This patch fixes the GPIO QMSI shim driver so we are able to use it in
Quark D2000 based platforms. To enable this driver we have to add a few
 #if guards because some macros and functions (e.g. QM_AON_GPIO_0 and
qm_aon_gpio_isr_0) are not defined in QMSI headers from Quark D2000
(this SoC doesn't support the Always-On GPIO controller).

This patch also adds the QMSI driver default options to arch/x86/soc/
quark_d2000/Kconfig.

Change-Id: Ia16a345e1de3008f167ed66f891834607c05f4a2
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This commit is contained in:
Andre Guedes 2016-02-17 18:08:02 -02:00 committed by Anas Nashif
parent 11ee779feb
commit 2b608b1e59
2 changed files with 19 additions and 4 deletions
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9
arch/x86/soc/quark_d2000/Kconfig
View file

@ -218,4 +218,13 @@ config I2C_QMSI_0_INT_PRIORITY
endif # I2C_QMSI
endif # I2C
if GPIO_QMSI
config GPIO_QMSI_0
def_bool y
config GPIO_QMSI_0_IRQ
default 15
config GPIO_QMSI_0_PRI
default 0
endif # GPIO_QMSI
endif # SOC_QUARK_D2000

14
drivers/gpio/gpio_qmsi.c
View file

@ -106,16 +106,14 @@ static void gpio_qmsi_0_int_callback(uint32_t status)
#endif
}
#ifdef CONFIG_GPIO_QMSI_AON
static void gpio_qmsi_aon_int_callback(uint32_t status)
{
#ifndef CONFIG_GPIO_QMSI_AON
return;
#else
struct device *port = DEVICE_GET(gpio_aon);
gpio_qmsi_callback(port, status);
#endif
}
#endif /* CONFIG_GPIO_QMSI_AON */
static void qmsi_write_bit(uint32_t *target, uint8_t bit, uint8_t value)
{
@ -153,9 +151,13 @@ static inline void qmsi_pin_config(struct device *port, uint32_t pin, int flags)
case QM_GPIO_0:
cfg.callback = gpio_qmsi_0_int_callback;
break;
#ifdef CONFIG_GPIO_QMSI_AON
case QM_AON_GPIO_0:
cfg.callback = gpio_qmsi_aon_int_callback;
break;
#endif /* CONFIG_GPIO_QMSI_AON */
default:
return;
}
@ -298,6 +300,8 @@ int gpio_qmsi_init(struct device *port)
irq_enable(CONFIG_GPIO_QMSI_0_IRQ);
QM_SCSS_INT->int_gpio_mask &= ~BIT(0);
break;
#ifdef CONFIG_GPIO_QMSI_AON
case QM_AON_GPIO_0:
IRQ_CONNECT(CONFIG_GPIO_QMSI_AON_IRQ,
CONFIG_GPIO_QMSI_AON_PRI, qm_aon_gpio_isr_0,
@ -305,6 +309,8 @@ int gpio_qmsi_init(struct device *port)
irq_enable(CONFIG_GPIO_QMSI_AON_IRQ);
QM_SCSS_INT->int_aon_gpio_mask &= ~BIT(0);
break;
#endif /* CONFIG_GPIO_QMSI_AON */
default:
return DEV_FAIL;
}