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Kconfig: Introduce RISCV_HAS_CLIC

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Introduce a new RISCV_HAS_CLIC symbol for platforms using CLIC,
reorganize the Kconfigs and make the Nuclei ECLIC depending on the new
symbol.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit is contained in:
Carlo Caione 2022-07-07 16:27:17 +02:00 committed by Carles Cufí
parent b397a950c5
commit 31c5dc2230
5 changed files with 26 additions and 23 deletions
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16
drivers/interrupt_controller/Kconfig
View file

@ -16,20 +16,10 @@ config ARCV2_INTERRUPT_UNIT
building a processor, you can configure the processor to include an
interrupt unit. The ARCv2 interrupt unit is highly programmable.
config PLIC
bool "Platform Level Interrupt Controller (PLIC)"
default y
depends on RISCV_HAS_PLIC
select MULTI_LEVEL_INTERRUPTS
select 2ND_LEVEL_INTERRUPTS
help
Platform Level Interrupt Controller provides support
for external interrupt lines defined by the RISC-V SoC;
config SWERV_PIC
bool "SweRV EH1 Programmable Interrupt Controller (PIC)"
help
Programmable Interrupt Controller for the SweRV EH1 RISC-V CPU;
Programmable Interrupt Controller for the SweRV EH1 RISC-V CPU.
config VEXRISCV_LITEX_IRQ
bool "VexRiscv LiteX Interrupt controller"
@ -82,8 +72,10 @@ source "drivers/interrupt_controller/Kconfig.esp32c3"
source "drivers/interrupt_controller/Kconfig.xec"
source "drivers/interrupt_controller/Kconfig.eclic"
source "drivers/interrupt_controller/Kconfig.clic"
source "drivers/interrupt_controller/Kconfig.gd32_exti"
source "drivers/interrupt_controller/Kconfig.plic"
endmenu

9
drivers/interrupt_controller/Kconfig.eclic → drivers/interrupt_controller/Kconfig.clic
View file

@ -1,18 +1,11 @@
# Nuclei ECLIC interrupt-controller configuration
# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
# SPDX-License-Identifier: Apache-2.0
DT_COMPAT_NUCLEI_ECLIC = nuclei,eclic
config HAS_NUCLEI_ECLIC
bool
help
Indicate that the platform has ECLIC.
config NUCLEI_ECLIC
bool "Enhanced Core Local Interrupt Controller (ECLIC)"
default $(dt_compat_enabled,$(DT_COMPAT_NUCLEI_ECLIC))
depends on HAS_NUCLEI_ECLIC
depends on RISCV_HAS_CLIC
help
Interrupt controller for Nuclei SoC core.

12
drivers/interrupt_controller/Kconfig.plic Normal file
View file

@ -0,0 +1,12 @@
# Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
# SPDX-License-Identifier: Apache-2.0
config PLIC
bool "Platform Level Interrupt Controller (PLIC)"
default y
depends on RISCV_HAS_PLIC
select MULTI_LEVEL_INTERRUPTS
select 2ND_LEVEL_INTERRUPTS
help
Platform Level Interrupt Controller provides support
for external interrupt lines defined by the RISC-V SoC.

10
soc/riscv/riscv-privilege/Kconfig
View file

@ -13,10 +13,16 @@ config SOC_FAMILY
depends on SOC_FAMILY_RISCV_PRIVILEGE
config RISCV_HAS_PLIC
bool "Does the SOC provide support for a Platform Level Interrupt Controller"
bool "Does the SOC provide support for a Platform Level Interrupt Controller (PLIC)"
depends on SOC_FAMILY_RISCV_PRIVILEGE
help
Does the SOC provide support for a Platform Level Interrupt Controller
Does the SOC provide support for a Platform Level Interrupt Controller (PLIC).
config RISCV_HAS_CLIC
bool "Does the SOC provide support for a Core-Local Interrupt Controller (CLIC)"
depends on SOC_FAMILY_RISCV_PRIVILEGE
help
Does the SOC provide support for a Core-Local Interrupt Controller (CLIC).
config RISCV_MTVEC_VECTORED_MODE
bool "Should the SOC use mtvec in vectored mode"

2
soc/riscv/riscv-privilege/gd32vf103/Kconfig.series
View file

@ -13,7 +13,7 @@ config SOC_SERIES_GD32VF103
select XIP
select GD32_HAS_AFIO_PINMUX
select HAS_GD32_HAL
select HAS_NUCLEI_ECLIC
select RISCV_HAS_CLIC
help
Enable support for GigaDevice GD32VF1 series SoC