drivers: hwinfo: modification into hwinfo_get_reset_cause()
add retrieve flag SB into hwinfo_get_reset_cause() add Clear flag SB into clear_reset_cause() Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
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@ -10,6 +10,7 @@
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#if defined(CONFIG_SOC_SERIES_STM32H5X)
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#include <stm32_ll_icache.h>
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#endif /* CONFIG_SOC_SERIES_STM32H5X */
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#include <stm32_ll_pwr.h>
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#include <zephyr/drivers/hwinfo.h>
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#include <string.h>
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#include <zephyr/sys/byteorder.h>
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@ -113,6 +114,28 @@ int z_impl_hwinfo_get_reset_cause(uint32_t *cause)
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}
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#endif
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#if defined(CONFIG_SOC_SERIES_STM32H7X) && defined(CORE_CM4)
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if (LL_PWR_CPU2_IsActiveFlag_SB()) {
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flags |= RESET_LOW_POWER_WAKE;
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}
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#elif defined(CONFIG_SOC_SERIES_STM32H7X) && defined(CORE_CM7)
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if (LL_PWR_CPU_IsActiveFlag_SB()) {
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flags |= RESET_LOW_POWER_WAKE;
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}
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#elif defined(CONFIG_SOC_SERIES_STM32MP1X)
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if (LL_PWR_MCU_IsActiveFlag_SB()) {
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flags |= RESET_LOW_POWER_WAKE;
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}
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#elif defined(CONFIG_SOC_SERIES_STM32WLX) || defined(CONFIG_SOC_SERIES_STM32WBX)
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if (LL_PWR_IsActiveFlag_C1SB()) {
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flags |= RESET_LOW_POWER_WAKE;
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}
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#elif defined(PWR_FLAG_SB)
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if (LL_PWR_IsActiveFlag_SB()) {
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flags |= RESET_LOW_POWER_WAKE;
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}
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#endif /* PWR_FLAG_SB */
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*cause = flags;
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return 0;
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@ -122,6 +145,18 @@ int z_impl_hwinfo_clear_reset_cause(void)
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{
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LL_RCC_ClearResetFlags();
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#if defined(CONFIG_SOC_SERIES_STM32H7X) && defined(CORE_CM4)
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LL_PWR_ClearFlag_CPU2();
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#elif defined(CONFIG_SOC_SERIES_STM32H7X) && defined(CORE_CM7)
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LL_PWR_ClearFlag_CPU();
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#elif defined(CONFIG_SOC_SERIES_STM32MP1X)
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LL_PWR_ClearFlag_MCU();
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#elif defined(CONFIG_SOC_SERIES_STM32WLX) || defined(CONFIG_SOC_SERIES_STM32WBX)
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LL_PWR_ClearFlag_C1STOP_C1STB();
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#elif defined(PWR_FLAG_SB)
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LL_PWR_ClearFlag_SB();
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#endif /* PWR_FLAG_SB */
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return 0;
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}
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