drivers: pci: update prt retrieve based on pnp id
update prt retrieve based on acpi pnp id instead of acpi device path/name Signed-off-by: Najumon B.A <najumon.ba@intel.com>
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@ -5,6 +5,8 @@
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* SPDX-License-Identifier: Apache-2.0
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* SPDX-License-Identifier: Apache-2.0
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*/
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*/
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#define DT_DRV_COMPAT pcie_controller
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#include <zephyr/logging/log.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(pcie, LOG_LEVEL_ERR);
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LOG_MODULE_REGISTER(pcie, LOG_LEVEL_ERR);
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@ -28,6 +30,11 @@ LOG_MODULE_REGISTER(pcie, LOG_LEVEL_ERR);
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#include <zephyr/drivers/pcie/controller.h>
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#include <zephyr/drivers/pcie/controller.h>
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#endif
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#endif
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#ifdef CONFIG_PCIE_PRT
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/* platform interrupt are hardwired or can be dynamically allocated. */
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static bool prt_en;
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#endif
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/* functions documented in drivers/pcie/pcie.h */
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/* functions documented in drivers/pcie/pcie.h */
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bool pcie_probe(pcie_bdf_t bdf, pcie_id_t id)
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bool pcie_probe(pcie_bdf_t bdf, pcie_id_t id)
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@ -303,8 +310,16 @@ unsigned int pcie_alloc_irq(pcie_bdf_t bdf)
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irq >= CONFIG_MAX_IRQ_LINES ||
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irq >= CONFIG_MAX_IRQ_LINES ||
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arch_irq_is_used(irq)) {
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arch_irq_is_used(irq)) {
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/* In some platforms, PCI interrupts are hardwired to specific interrupt inputs
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* on the interrupt controller and are not configurable. Hence we need to retrieve
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* IRQ from acpi. But if it is configurable then we allocate irq dynamically.
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*/
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#ifdef CONFIG_PCIE_PRT
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#ifdef CONFIG_PCIE_PRT
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irq = acpi_legacy_irq_get(bdf);
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if (prt_en) {
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irq = acpi_legacy_irq_get(bdf);
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} else {
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irq = arch_irq_allocate();
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}
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#else
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#else
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irq = arch_irq_allocate();
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irq = arch_irq_allocate();
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#endif
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#endif
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@ -545,6 +560,21 @@ static int pcie_init(void)
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.flags = PCIE_SCAN_RECURSIVE,
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.flags = PCIE_SCAN_RECURSIVE,
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};
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};
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#ifdef CONFIG_PCIE_PRT
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const char *hid, *uid = ACPI_DT_UID(DT_DRV_INST(0));
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int ret;
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BUILD_ASSERT(ACPI_DT_HAS_HID(DT_DRV_INST(0)),
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"No HID property for PCIe devicetree node");
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hid = ACPI_DT_HID(DT_DRV_INST(0));
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ret = acpi_legacy_irq_init(hid, uid);
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if (!ret) {
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prt_en = true;
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} else {
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__ASSERT(ret == -ENOENT, "Error retrieve interrupt routing table!");
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}
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#endif
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STRUCT_SECTION_COUNT(pcie_dev, &data.max_dev);
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STRUCT_SECTION_COUNT(pcie_dev, &data.max_dev);
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/* Don't bother calling pcie_scan() if there are no devices to look for */
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/* Don't bother calling pcie_scan() if there are no devices to look for */
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@ -1,8 +0,0 @@
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# Copyright (c) 2020 Intel Corporation
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# SPDX-License-Identifier: Apache-2.0
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description: Intel PCIe host controller
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compatible: "intel,pcie"
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include: pcie-controller.yaml
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@ -3,7 +3,11 @@
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# Common fields for PCIe bus controllers
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# Common fields for PCIe bus controllers
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include: base.yaml
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include: [base.yaml, acpi.yaml]
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description: Generic PCIe host controller
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compatible: "pcie-controller"
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bus: pcie
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bus: pcie
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