arc: fix alignment of IRQ vector table

On ARC the IRQ and exception vectors are just one big array of
function pointers placed at the very beginning of the binary in ROM.
Vectors 0-15 are for CPU exceptions, 16-255 for interrupts.

In Zephyr these have been logically split into an execption table
followed immediately by the IRQ table, specified in the ARC linker.cmd.
However, the exception vector table defined in Zephyr had only 14
entries so the IRQ table was misaligned by 8 bytes. This went undetected
for some time as in the default configuration every entry in the IRQ
table pointed to the common demux function _isr_enter().

This patch correctly ensures that the IRQ table begins at address
0x40000040 instead of 0x40000038 like it had been.

Change-Id: I3b548df0dcabeb9d986ecd6a41e593bd02e3bd73
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit is contained in:
Andrew Boie 2016-01-04 13:24:48 -08:00 committed by Anas Nashif
parent d0ab1a816e
commit 377f616b3c

View file

@ -52,6 +52,8 @@ struct vector_table {
uint32_t ev_div_zero;
uint32_t ev_dc_error;
uint32_t ev_maligned;
uint32_t unused_1;
uint32_t unused_2;
};
struct vector_table _VectorTable _GENERIC_SECTION(.exc_vector_table) = {
@ -69,6 +71,8 @@ struct vector_table _VectorTable _GENERIC_SECTION(.exc_vector_table) = {
(uint32_t)__ev_div_zero,
(uint32_t)__ev_dc_error,
(uint32_t)__ev_maligned,
0,
0
};
extern struct vector_table __start _ALIAS_OF(_VectorTable);