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arch: introduce arch_smp_init

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Introduce a new arch interface for intializing smp.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2023-12-13 12:53:49 -05:00 committed by Carles Cufí
parent 7bde51bccf
commit 37f427a5c7
8 changed files with 18 additions and 12 deletions
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5
arch/arc/core/arc_smp.c
View file

@ -145,7 +145,7 @@ void arch_sched_ipi(void)
}
}
static int arc_smp_init(void)
int arch_smp_init(void)
{
struct arc_connect_bcr bcr;
@ -188,6 +188,5 @@ static int arc_smp_init(void)
return 0;
}
SYS_INIT(arc_smp_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
SYS_INIT(arch_smp_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

4
arch/arm/core/cortex_a_r/smp.c
View file

@ -245,7 +245,7 @@ void arch_sched_ipi(void)
broadcast_ipi(SGI_SCHED_IPI);
}
static int arm_smp_init(void)
int arch_smp_init(void)
{
cpu_map[0] = MPIDR_TO_CORE(GET_MPIDR());
@ -259,6 +259,6 @@ static int arm_smp_init(void)
return 0;
}
SYS_INIT(arm_smp_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
SYS_INIT(arch_smp_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

1
arch/arm64/core/prep_c.c
View file

@ -69,6 +69,7 @@ void z_prep_c(void)
CODE_UNREACHABLE;
}
#if CONFIG_MP_MAX_NUM_CPUS > 1
extern FUNC_NORETURN void z_arm64_secondary_start(void);
void z_arm64_secondary_prep_c(void)

4
arch/arm64/core/smp.c
View file

@ -279,7 +279,7 @@ void arch_spin_relax(void)
}
#endif
static int arm64_smp_init(void)
int arch_smp_init(void)
{
cpu_map[0] = MPIDR_TO_CORE(GET_MPIDR());
@ -302,6 +302,6 @@ static int arm64_smp_init(void)
return 0;
}
SYS_INIT(arm64_smp_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
SYS_INIT(arch_smp_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif

5
arch/riscv/core/smp.c
View file

@ -151,7 +151,7 @@ void arch_spin_relax(void)
}
#endif
static int riscv_smp_init(void)
int arch_smp_init(void)
{
IRQ_CONNECT(RISCV_MACHINE_SOFT_IRQ, 0, ipi_handler, NULL, 0);
@ -159,6 +159,5 @@ static int riscv_smp_init(void)
return 0;
}
SYS_INIT(riscv_smp_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
SYS_INIT(arch_smp_init, PRE_KERNEL_2, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
#endif /* CONFIG_SMP */

6
arch/x86/core/intel64/irq.c
View file

@ -14,6 +14,7 @@
#include <zephyr/logging/log.h>
#include <zephyr/sys/iterable_sections.h>
#include <x86_mmu.h>
#include <zephyr/init.h>
LOG_MODULE_DECLARE(os, CONFIG_KERNEL_LOG_LEVEL);
@ -154,7 +155,7 @@ void arch_irq_offload(irq_offload_routine_t routine, const void *parameter)
#if defined(CONFIG_SMP)
void z_x86_ipi_setup(void)
int arch_smp_init(void)
{
/*
* z_sched_ipi() doesn't have the same signature as a typical ISR, so
@ -166,8 +167,11 @@ void z_x86_ipi_setup(void)
/* TLB shootdown handling */
x86_irq_funcs[CONFIG_TLB_IPI_VECTOR - IV_IRQS] = z_x86_tlb_ipi;
return 0;
}
SYS_INIT(arch_smp_init, PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT);
/*
* it is not clear exactly how/where/why to abstract this, as it
* assumes the use of a local APIC (but there's no other mechanism).

2
arch/x86/core/prep_c.c
View file

@ -74,7 +74,7 @@ FUNC_NORETURN void z_prep_c(void *arg)
#endif
#if defined(CONFIG_SMP)
z_x86_ipi_setup();
arch_smp_init();
#endif
z_cstart();

3
include/zephyr/sys/arch_interface.h
View file

@ -495,6 +495,9 @@ static inline uint32_t arch_proc_id(void);
*/
void arch_sched_ipi(void);
int arch_smp_init(void);
#endif /* CONFIG_SMP */
/**