drivers: ieee802154: cc2520: Let's use only symetrical tx/rx spi buffer
Other driver than QMSI might have this limitation. Let's wait for a future rework of SPI API to properly fix that. Change-Id: Ibad382ce86e7479961b275c4851abf88ed581023 Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
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@ -468,11 +468,6 @@ static inline void flush_rxfifo(struct cc2520_context *cc2520)
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write_reg_excflag0(&cc2520->spi, EXCFLAG0_RESET_RX_FLAGS);
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}
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#ifdef CONFIG_SPI_QMSI
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/** This is a workaround, for SPI QMSI drivers as current QMSI API does not
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* support asymmetric tx/rx buffer lengths.
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* (i.e.: it's up to the user to handle tx dummy bytes in tx buffer)
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*/
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static inline uint8_t read_rxfifo_length(struct cc2520_spi *spi)
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{
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spi->cmd_buf[0] = CC2520_INS_RXBUF;
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@ -513,46 +508,6 @@ static inline bool read_rxfifo_content(struct cc2520_spi *spi,
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return true;
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}
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#else /* CONFIG_SPI_QMSI */
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static inline uint8_t read_rxfifo_length(struct cc2520_spi *spi)
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{
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spi->cmd_buf[0] = CC2520_INS_RXBUF;
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spi_slave_select(spi->dev, spi->slave);
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if (spi_transceive(spi->dev, spi->cmd_buf, 1,
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spi->cmd_buf, 2) == 0) {
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return spi->cmd_buf[1];
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}
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return 0;
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}
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static inline bool read_rxfifo_content(struct cc2520_spi *spi,
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struct net_buf *buf, uint8_t len)
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{
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uint8_t data[128+1];
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spi->cmd_buf[0] = CC2520_INS_RXBUF;
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spi_slave_select(spi->dev, spi->slave);
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if (spi_transceive(spi->dev, spi->cmd_buf, 1, data, len+1) != 0) {
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return false;
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}
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if (read_reg_excflag0(spi) & EXCFLAG0_RX_UNDERFLOW) {
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SYS_LOG_ERR("RX underflow!\n");
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return false;
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}
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memcpy(buf->data, &data[1], len);
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net_buf_add(buf, len);
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return true;
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}
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#endif /* CONFIG_SPI_QMSI */
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static inline bool verify_crc(struct cc2520_context *cc2520)
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{
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cc2520->spi.cmd_buf[0] = CC2520_INS_RXBUF;
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