boards: arm: add nrf9131ek_nrf9131

This patch adds the nRF9131-EK board.

Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
This commit is contained in:
Maximilian Deubel 2023-09-01 11:20:03 +02:00 committed by Carles Cufí
parent 8bec2d7b37
commit 386b658008
14 changed files with 596 additions and 0 deletions

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# nRF9131-EK board configuration
# Copyright (c) 2023 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF9131_LACA
config BOARD_NRF9131EK_NRF9131
bool "nRF9131 EK NRF9131"
config BOARD_NRF9131EK_NRF9131_NS
bool "nRF9131 EK NRF9131 non-secure"
endif # SOC_NRF9131_LACA

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# nRF9131 EK NRF9131 board configuration
# Copyright (c) 2023 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if BOARD_NRF9131EK_NRF9131 || BOARD_NRF9131EK_NRF9131_NS
config BOARD
default "nrf9131ek_nrf9131"
# For the secure version of the board the firmware is linked at the beginning
# of the flash, or into the code-partition defined in DT if it is intended to
# be loaded by MCUboot. If the secure firmware is to be combined with a non-
# secure image (TRUSTED_EXECUTION_SECURE=y), the secure FW image shall always
# be restricted to the size of its code partition.
# For the non-secure version of the board, the firmware
# must be linked into the code-partition (non-secure) defined in DT, regardless.
# Apply this configuration below by setting the Kconfig symbols used by
# the linker according to the information extracted from DT partitions.
# Workaround for not being able to have commas in macro arguments
DT_CHOSEN_Z_CODE_PARTITION := zephyr,code-partition
config FLASH_LOAD_SIZE
default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
depends on BOARD_NRF9131EK_NRF9131 && TRUSTED_EXECUTION_SECURE
if BOARD_NRF9131EK_NRF9131_NS
config FLASH_LOAD_OFFSET
default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
config FLASH_LOAD_SIZE
default $(dt_chosen_reg_size_hex,$(DT_CHOSEN_Z_CODE_PARTITION))
endif # BOARD_NRF9131EK_NRF9131_NS
endif # BOARD_NRF9131EK_NRF9131 || BOARD_NRF9131EK_NRF9131_NS

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# SPDX-License-Identifier: Apache-2.0
if(CONFIG_BOARD_NRF9131EK_NRF9131_NS)
set(TFM_PUBLIC_KEY_FORMAT "full")
endif()
if(CONFIG_TFM_FLASH_MERGED_BINARY)
set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
endif()
# TODO: change to nRF9131_xxAA when such device is available in JLink
board_runner_args(jlink "--device=nRF9160_xxAA" "--speed=4000")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

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/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nordic/nrf9131_laca.dtsi>
#include "nrf9131ek_nrf9131_common.dtsi"
/ {
chosen {
zephyr,sram = &sram0_s;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,sram-secure-partition = &sram0_s;
zephyr,sram-non-secure-partition = &sram0_ns;
};
};

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identifier: nrf9131ek_nrf9131
name: nRF9131-EK-NRF9131
type: mcu
arch: arm
toolchain:
- gnuarmemb
- xtools
- zephyr
ram: 88
flash: 1024
supported:
- gpio
- i2c
- pwm
- spi
- watchdog
- counter

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/*
* Copyright (c) 2023 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 11)>,
<NRF_PSEL(UART_RTS, 0, 10)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 12)>,
<NRF_PSEL(UART_CTS, 0, 9)>;
bias-pull-up;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 11)>,
<NRF_PSEL(UART_RX, 0, 12)>,
<NRF_PSEL(UART_RTS, 0, 10)>,
<NRF_PSEL(UART_CTS, 0, 9)>;
low-power-enable;
};
};
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 24)>,
<NRF_PSEL(UART_RTS, 0, 25)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 23)>,
<NRF_PSEL(UART_CTS, 0, 17)>;
bias-pull-up;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 24)>,
<NRF_PSEL(UART_RX, 0, 23)>,
<NRF_PSEL(UART_RTS, 0, 25)>,
<NRF_PSEL(UART_CTS, 0, 17)>;
low-power-enable;
};
};
i2c2_default: i2c2_default {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 8)>,
<NRF_PSEL(TWIM_SCL, 0, 7)>;
};
};
i2c2_sleep: i2c2_sleep {
group1 {
psels = <NRF_PSEL(TWIM_SDA, 0, 8)>,
<NRF_PSEL(TWIM_SCL, 0, 7)>;
low-power-enable;
};
};
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 29)>,
<NRF_PSEL(PWM_OUT1, 0, 30)>,
<NRF_PSEL(PWM_OUT2, 0, 31)>;
};
};
pwm0_sleep: pwm0_sleep {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 29)>,
<NRF_PSEL(PWM_OUT1, 0, 30)>,
<NRF_PSEL(PWM_OUT2, 0, 31)>;
low-power-enable;
};
};
spi3_default: spi3_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 22)>,
<NRF_PSEL(SPIM_MOSI, 0, 21)>;
nordic,drive-mode = <NRF_DRIVE_H0H1>;
};
};
spi3_sleep: spi3_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 20)>,
<NRF_PSEL(SPIM_MISO, 0, 22)>,
<NRF_PSEL(SPIM_MOSI, 0, 21)>;
low-power-enable;
};
};
};

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/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "nrf9131ek_nrf9131_common-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Nordic nRF9131 EK NRF9131";
compatible = "nordic,nrf9131-ek-nrf9131";
chosen {
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,uart-mcumgr = &uart0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
label = "Green LED 1";
};
led1: led_1 {
gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
label = "Green LED 2";
};
led2: led_2 {
gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
label = "Green LED 3";
};
};
pwmleds {
compatible = "pwm-leds";
pwm_led0: pwm_led_0 {
pwms = <&pwm0 0 PWM_MSEC(8) PWM_POLARITY_NORMAL>;
};
pwm_led1: pwm_led_1 {
pwms = <&pwm0 1 PWM_MSEC(8) PWM_POLARITY_NORMAL>;
};
pwm_led2: pwm_led_2 {
pwms = <&pwm0 2 PWM_MSEC(8) PWM_POLARITY_NORMAL>;
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpio0 28 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Push button 1";
zephyr,code = <INPUT_KEY_0>;
};
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
pwm-led0 = &pwm_led0;
pwm-led1 = &pwm_led1;
pwm-led2 = &pwm_led2;
sw0 = &button0;
bootloader-led0 = &led0;
mcuboot-button0 = &button0;
mcuboot-led0 = &led0;
watchdog0 = &wdt0;
spi-flash0 = &gd25wb256;
};
};
&adc {
status = "okay";
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&uart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
&i2c2 {
compatible = "nordic,nrf-twim";
status = "okay";
pinctrl-0 = <&i2c2_default>;
pinctrl-1 = <&i2c2_sleep>;
pinctrl-names = "default", "sleep";
clock-frequency = <I2C_BITRATE_FAST>;
pmic_main: npm1300@6b {
compatible = "nordic,npm1300";
reg = <0x6b>;
pmic_charger: charger {
compatible = "nordic,npm1300-charger";
term-microvolt = <4150000>;
term-warm-microvolt = <4000000>;
current-microamp = <150000>;
dischg-limit-microamp = <1000000>;
vbus-limit-microamp = <500000>;
thermistor-ohms = <10000>;
thermistor-beta = <3380>;
charging-enable;
};
regulators {
compatible = "nordic,npm1300-regulator";
BUCK1 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
BUCK2 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
};
};
};
&pwm0 {
status = "okay";
pinctrl-0 = <&pwm0_default>;
pinctrl-1 = <&pwm0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi3 {
compatible = "nordic,nrf-spim";
status = "okay";
cs-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&spi3_default>;
pinctrl-1 = <&spi3_sleep>;
pinctrl-names = "default", "sleep";
gd25wb256: gd25wb256e3ir@0 {
compatible = "jedec,spi-nor";
status = "disabled";
reg = <0>;
spi-max-frequency = <8000000>;
size = <268435456>;
has-dpd;
t-enter-dpd = <3000>;
t-exit-dpd = <40000>;
sfdp-bfp = [
e5 20 f3 ff ff ff ff 0f 44 eb 08 6b 08 3b 42 bb
ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52
10 d8 00 ff 44 7a c9 fe 83 67 26 62 ec 82 18 44
7a 75 7a 75 04 c4 d5 5c 00 06 74 00 08 50 00 01
];
jedec-id = [c8 65 19];
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x10000>;
};
slot0_partition: partition@10000 {
label = "image-0";
};
slot0_ns_partition: partition@50000 {
label = "image-0-nonsecure";
};
slot1_partition: partition@85000 {
label = "image-1";
};
slot1_ns_partition: partition@c5000 {
label = "image-1-nonsecure";
};
storage_partition: partition@fa000 {
label = "storage";
reg = <0x000fa000 0x00006000>;
};
};
};
/ {
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram0_s: image_s@20000000 {
/* Secure image memory */
};
sram0_modem: image_modem@20016000 {
/* Modem (shared) memory */
};
sram0_ns: image_ns@20020000 {
/* Non-Secure image memory */
};
};
};
/* Include partition configuration file */
#include "nrf9131ek_nrf9131_partition_conf.dtsi"

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# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_NRF91X=y
CONFIG_SOC_NRF9131_LACA=y
CONFIG_BOARD_NRF9131EK_NRF9131=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable TrustZone-M
CONFIG_ARM_TRUSTZONE_M=y
# enable GPIO
CONFIG_GPIO=y
# Enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_PINCTRL=y

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/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nordic/nrf9131ns_laca.dtsi>
#include "nrf9131ek_nrf9131_common.dtsi"
/ {
chosen {
zephyr,flash = &flash0;
zephyr,sram = &sram0_ns;
zephyr,code-partition = &slot0_ns_partition;
};
};
/* Disable UART1, because it is used by default in TF-M */
&uart1 {
status = "disabled";
};

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identifier: nrf9131ek_nrf9131_ns
name: nRF9131-EK-NRF9131-Non-Secure
type: mcu
arch: arm
toolchain:
- gnuarmemb
- xtools
- zephyr
ram: 128
flash: 212
supported:
- i2c
- pwm
- watchdog
- netif:modem

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# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_NRF91X=y
CONFIG_SOC_NRF9131_LACA=y
CONFIG_BOARD_NRF9131EK_NRF9131_NS=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable hardware stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable TrustZone-M
CONFIG_ARM_TRUSTZONE_M=y
# This Board implies building Non-Secure firmware
CONFIG_TRUSTED_EXECUTION_NONSECURE=y
# enable GPIO
CONFIG_GPIO=y
# Enable uart driver
CONFIG_SERIAL=y
# enable console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_PINCTRL=y
# enable PMIC
CONFIG_I2C=y
CONFIG_REGULATOR=y
CONFIG_SENSOR=y
CONFIG_NPM1300_CHARGER=y

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/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Default Flash planning for nRF9131ek_nrf9131.
*
* Zephyr build for nRF9131 with ARM TrustZone-M support,
* implies building Secure and Non-Secure Zephyr images.
*
* Secure image will be placed, by default, in flash0
* (or in slot0, if MCUboot is present).
* Secure image will use sram0 for system memory.
*
* Non-Secure image will be placed in slot0_ns, and use
* sram0_ns for system memory.
*
* Note that the Secure image only requires knowledge of
* the beginning of the Non-Secure image (not its size).
*/
&slot0_partition {
reg = <0x00010000 0x40000>;
};
&slot0_ns_partition {
reg = <0x00050000 0x35000>;
};
&slot1_partition {
reg = <0x00085000 0x40000>;
};
&slot1_ns_partition {
reg = <0x000c5000 0x35000>;
};
/* Default SRAM planning when building for nRF9131 with
* ARM TrustZone-M support
* - Lowest 88 kB SRAM allocated to Secure image (sram0_s).
* - 40 kB SRAM reserved for and used by the modem library
* (sram0_modem). This memory is Non-Secure.
* - Upper 128 kB allocated to Non-Secure image (sram0_ns).
* When building with TF-M, both sram0_modem and sram0_ns
* are allocated to the Non-Secure image.
*/
&sram0_s {
reg = <0x20000000 DT_SIZE_K(88)>;
};
&sram0_modem {
reg = <0x20016000 DT_SIZE_K(40)>;
};
&sram0_ns {
reg = <0x20020000 DT_SIZE_K(128)>;
};

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# Copyright (c) 2021 Linaro Limited
# SPDX-License-Identifier: Apache-2.0
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - flash-controller@39000 & kmu@39000
# - power@5000 & clock@5000
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")

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- bl5340_dvk_cpuapp_ns
- m5stack_core2
- mimxrt595_evk_cm33
- nrf9131ek_nrf9131
- nrf9131ek_nrf9131_ns