boards: arm: Add Legend 2.5" boards
This commit adds support for the Legend 2.5" boards (legend25_ssd and legend25_hdd) based on the STM32F070CB MCU. These boards can be found in the Seagate FireCuda Gaming Drive, Gaming Drive for Xbox, SSD Gaming Drive for Xbox, and Gaming Drive for PlayStation devices. Both boards contain the following hardware components: - A B1414 LED strip connected to the PA7 pin (SPI MOSI) - A SPI flash (FM25F005) connected on SPI2 bus The Legend 2.5" HDD board also contains an activity LED connected on TIM3 CH3 Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com> Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
This commit is contained in:
Maxime Bittan
Christopher Friedt
parent
ae0ef7e56a
commit
39614b8960
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@ -100,6 +100,7 @@
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/boards/arm/hexiwear*/ @MaureenHelm @mmahadevan108 @dleach02
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/boards/arm/hexiwear*/doc/ @MaureenHelm @MeganHansen
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/boards/arm/ip_k66f/ @parthitce @lmajewski
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/boards/arm/legend/ @mbittan @simonguinot
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/boards/arm/lpcxpresso*/ @MaureenHelm @mmahadevan108 @dleach02
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/boards/arm/lpcxpresso*/doc/ @MaureenHelm @MeganHansen
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/boards/arm/mimx8mm_evk/ @Mani-Sadhasivam
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8
boards/arm/legend/Kconfig.board
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8
boards/arm/legend/Kconfig.board
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# Legend board family configuration
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# Copyright (c) 2021 Seagate Technology
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_LEGEND
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bool "Legend board"
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depends on SOC_STM32F070XB
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15
boards/arm/legend/Kconfig.defconfig
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15
boards/arm/legend/Kconfig.defconfig
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# Legend board family configuration
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# Copyright (c) 2021, Seagate Technology LLC
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_LEGEND
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config BOARD
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default "legend"
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config SPI_STM32_INTERRUPT
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default y
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depends on SPI
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endif # BOARD_LEGEND
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6
boards/arm/legend/board.cmake
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6
boards/arm/legend/board.cmake
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@ -0,0 +1,6 @@
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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(jlink "--device=STM32F070CB" "--speed=4000")
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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BIN
boards/arm/legend/doc/img/firecuda_gaming_hard_drive.png
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BIN
boards/arm/legend/doc/img/firecuda_gaming_hard_drive.png
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Binary file not shown.
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After Width: | Height: | Size: 106 KiB |
131
boards/arm/legend/doc/index.rst
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131
boards/arm/legend/doc/index.rst
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.. _legend:
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Legend
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######
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Overview
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********
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The Legend board family contains two revisions: 25hdd and 25ssd.
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The Legend 2.5" HDD board (revision 25hdd) can be found in the Seagate FireCuda
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Gaming Hard Drive, Gaming Drive for Xbox and Gaming Drive for PlayStation
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devices. A 2.5" drive and two chips are embedded: an ASMedia ASM1153 USB-to-SATA
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bridge controller and a STM32F070 MCU. The former is handling the USB to HDD I/Os
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while the latter is dedicated to the LED effects. The two chips are connected
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together through I2C.
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The Legend 2.5" SSD board (revision 25ssd) is found in the Seagate SSD Gaming
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Drive for Xbox. A Realtek RTS5411S USB hub is embedded and connected to a Phison
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U17 2.5" SSD, as well as a STM32F070 MCU.
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On both boards, the Zephyr port is running on the STM32F070 MCU.
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.. image:: img/firecuda_gaming_hard_drive.png
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:width: 750px
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:align: center
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:alt: Seagate FireCuda Gaming Hard Drive
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Hardware
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********
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- STM32F070cb MCU:
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- ARM Cortex-M0+
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- 16KB SRAM
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- 128KB on-chip flash
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- External devices connected to the STM32F070cb MCU:
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- ASMedia ASM1153 USB-to-SATA bridge (I2C master on port 1) (HDD only)
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- 6 (hdd) or 4 (ssd) Everlight B1414 LEDs connected on SPI1 MOSI
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- 1 white LED (HDD only)
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- 64KB external SPI flash connected on SPI2
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Supported Features
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==================
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All the hardware features available on the Legend 2.5" boards are supported by
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Zephyr.
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| CLOCK | on-chip | clock and reset control |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c master/slave controller |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial |
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+-----------+------------+-------------------------------------+
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| SPI flash | on-chip | spi_nor |
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+-----------+------------+-------------------------------------+
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| LED strip | on-chip | ws2812 |
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+-----------+------------+-------------------------------------+
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| USB | on-chip | usb |
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+-----------+------------+-------------------------------------+
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Connections and IOs
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===================
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+---------+-----------------+----------------------------+
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| Name | Function | Usage |
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+=========+=================+============================+
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| PB6 | I2C1 | I2C1 SCL (HDD only) |
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+---------+-----------------+----------------------------+
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| PB7 | I2C1 | I2C1 SDA (HDD only) |
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+---------+-----------------+----------------------------+
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| PA10 | UART | USART0 RX |
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+---------+-----------------+----------------------------+
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| PA9 | UART | USART0 TX |
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+---------+-----------------+----------------------------+
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| PB0 | PWM | Activity LED (HDD only) |
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+---------+-----------------+----------------------------+
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| PB12 | SPI2 | SPI2 Enable |
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+---------+-----------------+----------------------------+
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| PB13 | SPI2 | SPI2 Clock |
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+---------+-----------------+----------------------------+
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| PB14 | SPI2 | SPI2 MISO |
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+---------+-----------------+----------------------------+
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| PB15 | SPI2 | SPI2 MOSI |
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+---------+-----------------+----------------------------+
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| PA7 | LED strip | SPI1 MOSI |
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+---------+-----------------+----------------------------+
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| PA12 | USB | USB DM (SSD only) |
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+---------+-----------------+----------------------------+
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| PA13 | USB | USB DP (SSD only) |
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+---------+-----------------+----------------------------+
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Programming and Debugging
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*************************
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Flashing
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========
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The STM32F070cb MCU can be flashed by connecting an external debug probe to the
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SWD port (on-board 4-pin header). In the default OpenOCD configuration, the
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ST Link interface is selected. You may need to replace it with the interface of
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your debug probe.
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Once the debug probe is connected to both the Legend board and your host
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computer, then you can simply run the ``west flash`` command to write a firmware
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image into flash.
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Debugging
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=========
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Please refer to the `Flashing`_ section and run the ``west debug`` command
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instead of ``west flash``.
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References
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**********
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- `STM32F070 reference manual`_
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.. _STM32F070 reference manual:
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http://www.st.com/resource/en/reference_manual/dm00031936.pdf
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191
boards/arm/legend/legend.dts
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191
boards/arm/legend/legend.dts
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@ -0,0 +1,191 @@
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/*
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* Copyright (c) 2021 Seagate Technology LLC
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <st/f0/stm32f070Xb.dtsi>
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#include <st/f0/stm32f070cbtx-pinctrl.dtsi>
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#include <dt-bindings/led/led.h>
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#include <dt-bindings/led/seagate_legend_b1414.h>
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/ {
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chosen {
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zephyr,console = &usart1;
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zephyr,shell-uart = &usart1;
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zephyr,sram = &sram0;
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zephyr,flash = &flash0;
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};
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aliases {
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watchdog0 = &iwdg;
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};
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board_id: brd-id {
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compatible = "gpio-keys";
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brd_id0: brd_id_0 {
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label = "BRD_ID_0";
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gpios = <&gpioc 13 0>;
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};
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brd_id1: brd_id_1 {
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label = "BRD_ID_1";
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gpios = <&gpioc 14 0>;
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};
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brd_id2: brd_id_2 {
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label = "BRD_ID_2";
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gpios = <&gpioc 15 0>;
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};
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};
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};
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&usart1 {
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pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
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current-speed = <115200>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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status = "okay";
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};
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&spi1 {
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pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
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dmas = <&dma1 3 0x20440>, <&dma1 2 0x20480>;
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dma-names = "tx", "rx";
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status = "okay";
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led_strip_spi: b1414@0 {
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compatible = "everlight,b1414", "worldsemi,ws2812-spi";
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label = "B1414";
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/* SPI */
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reg = <0>; /* ignored, but necessary for SPI bindings */
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spi-max-frequency = <SPI_FREQ>;
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/* B1414 */
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spi-one-frame = <ONE_FRAME>;
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spi-zero-frame = <ZERO_FRAME>;
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color-mapping = <LED_COLOR_ID_RED>,
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<LED_COLOR_ID_GREEN>,
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<LED_COLOR_ID_BLUE>;
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reset-delay = <250>;
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};
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};
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&spi2 {
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pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
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cs-gpios = <&gpiob 12 GPIO_ACTIVE_LOW>;
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status = "okay";
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spi_nor: spi_nor@0 {
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status = "okay";
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <8000000>;
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label = "SPI_FLASH_0";
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size = <1048576>;
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/*
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* Main flash source
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*
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* Vendor : Puya
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* Model : P25Q21H
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* Total size : 256 KB
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* Erase size : whole chip, 64 and 32 KB blocks, 4 KB sectors,
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* 256 B pages
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* Write size : up to 256 B (page size)
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* Lifetime : 100K erase/program cycles on each sector/block
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*/
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jedec-id = [85 40 12];
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/*
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* Alternate flash source
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*
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* Vendor : Fudan
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* Model : FM25F01B
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* Total size : 128 KB
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* Erase size : whole chip, 64 and 32 KB blocks, 4 KB sectors
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* Write size : up to 256 B (page size)
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* Lifetime : 100K erase/program cycles on each sector/block
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*
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* jedec-id = [a1 31 11];
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*
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* Model only found in first Jordan (2"5) EVT revision
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*
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* Vendor : Fudan
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* Model : FM25F005
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* Total size : 64 KB
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* Erase size : whole chip, 64 and 32 KB blocks, 4 KB sectors
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*
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* jedec-id = [a1 31 10];
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*/
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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product_info: partition@0 {
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label = "product-info";
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reg = <0x00000000 0x1000>;
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};
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led_das: partition@10000 {
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label = "led-das";
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reg = <0x00001000 0x0000f000>;
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};
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};
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};
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};
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&spi_nor {
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status = "okay";
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};
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&dma1 {
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status = "okay";
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};
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&timers3 {
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pwm3: pwm {
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pinctrl-0 = <&tim3_ch3_pb0>;
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/*
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* The maximum period needed on Legend devices for activity LED
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* hardware blinking is 250ms (i.e. "error" fast blink at 4 Hz).
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*
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* We can use the following equation to compute the
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* corresponding prescaler value:
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*
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* period_max = counter_size / cycles_per_second
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*
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* With:
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*
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* cycles_per_second = 48 MHz / (prescaler + 1)
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* counter_size = 2^16
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* period_max = 0.25
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*
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* Which gives:
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*
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* prescaler = 48 MHz * 0.25 / 2^16 + 1 = 182
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*
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* So any prescaler value above 182 is good for a 4 Hz hardware
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* blinking. In addition the PWM frequency must be as high as
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* possible to fool eyes and cameras with steady brightness
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* levels.
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*/
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st,prescaler = <200>;
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status = "disabled";
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};
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};
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&gpiod {
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status = "disabled";
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};
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&gpiof {
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status = "disabled";
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};
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&iwdg {
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status = "okay";
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};
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19
boards/arm/legend/legend.yaml
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19
boards/arm/legend/legend.yaml
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identifier: legend
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name: Legend
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type: mcu
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arch: arm
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ram: 16
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flash: 128
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toolchain:
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- zephyr
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- gnuarmemb
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- xtools
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supported:
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- gpio
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- i2c
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- pwm
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- spi
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testing:
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ignore_tags:
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- net
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- bluetooth
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56
boards/arm/legend/legend_25hdd.overlay
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56
boards/arm/legend/legend_25hdd.overlay
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@ -0,0 +1,56 @@
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/*
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* Copyright (c) 2021 Seagate Technology LLC
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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model = "Seagate Legend 2.5 HDD board";
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compatible = "legend25_hdd", "seagate,legend25_hdd";
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aliases {
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pwm-led0 = &pwm_led0;
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led-strip = &led_strip_spi;
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};
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led_pwm: pwmleds {
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compatible = "pwm-leds";
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label = "LED PWM";
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pwm_led0: pwm_led_0 {
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label = "Activity LED";
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pwms = <&pwm3 3 255 PWM_POLARITY_NORMAL>;
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};
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};
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};
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&clk_hsi {
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status = "okay";
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};
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&pll {
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clocks = <&clk_hsi>;
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prediv = <1>;
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mul = <6>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(48)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <1>;
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};
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&led_strip_spi {
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chain-length = <6>;
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status = "okay";
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};
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&timers3 {
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status = "okay";
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};
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&pwm3 {
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status = "okay";
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};
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42
boards/arm/legend/legend_25ssd.overlay
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42
boards/arm/legend/legend_25ssd.overlay
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/*
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* Copyright (c) 2021 Seagate Technology LLC
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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model = "Seagate Legend 2.5 SSD board";
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compatible = "legend25_ssd", "seagate,legend25_ssd";
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aliases {
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led-strip = &led_strip_spi;
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};
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(24)>; /* 24MHz external clock */
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status = "okay";
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};
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&pll {
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clocks = <&clk_hse>;
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prediv = <1>;
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mul = <2>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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||||
clock-frequency = <DT_FREQ_M(48)>;
|
||||
ahb-prescaler = <1>;
|
||||
apb1-prescaler = <1>;
|
||||
};
|
||||
|
||||
&led_strip_spi {
|
||||
chain-length = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb {
|
||||
status = "okay";
|
||||
};
|
||||
23
boards/arm/legend/legend_defconfig
Normal file
23
boards/arm/legend/legend_defconfig
Normal file
|
|
@ -0,0 +1,23 @@
|
|||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
# Zephyr Kernel Configuration
|
||||
CONFIG_SOC_SERIES_STM32F0X=y
|
||||
|
||||
# Platform Configuration
|
||||
CONFIG_SOC_STM32F070XB=y
|
||||
|
||||
# Serial Drivers
|
||||
CONFIG_SERIAL=y
|
||||
CONFIG_UART_INTERRUPT_DRIVEN=y
|
||||
# enable console
|
||||
CONFIG_CONSOLE=y
|
||||
CONFIG_UART_CONSOLE=y
|
||||
|
||||
# Pinmux Driver
|
||||
CONFIG_PINMUX=y
|
||||
|
||||
# GPIO Controller
|
||||
CONFIG_GPIO=y
|
||||
|
||||
# Clock Control
|
||||
CONFIG_CLOCK_CONTROL=y
|
||||
8
boards/arm/legend/revision.cmake
Normal file
8
boards/arm/legend/revision.cmake
Normal file
|
|
@ -0,0 +1,8 @@
|
|||
set(LEGEND_REVISIONS "25hdd" "25ssd")
|
||||
if (NOT DEFINED BOARD_REVISION)
|
||||
set(BOARD_REVISION "25hdd")
|
||||
else()
|
||||
if (NOT BOARD_REVISION IN_LIST LEGEND_REVISIONS)
|
||||
message(FATAL_ERROR "${BOARD_REVISION} is not a valid revision for Legend. Accepted revisions: ${LEGEND_REVISIONS}")
|
||||
endif()
|
||||
endif()
|
||||
12
boards/arm/legend/support/openocd.cfg
Normal file
12
boards/arm/legend/support/openocd.cfg
Normal file
|
|
@ -0,0 +1,12 @@
|
|||
source [find board/st_nucleo_f0.cfg]
|
||||
|
||||
$_TARGETNAME configure -event gdb-attach {
|
||||
echo "Debugger attaching: halting execution"
|
||||
reset halt
|
||||
gdb_breakpoint_override hard
|
||||
}
|
||||
|
||||
$_TARGETNAME configure -event gdb-detach {
|
||||
echo "Debugger detaching: resuming execution"
|
||||
resume
|
||||
}
|
||||
20
include/dt-bindings/led/seagate_legend_b1414.h
Normal file
20
include/dt-bindings/led/seagate_legend_b1414.h
Normal file
|
|
@ -0,0 +1,20 @@
|
|||
/*
|
||||
* Copyright (c) 2021, Seagate Technology LLC
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
#ifndef ZEPHYR_SAMPLES_DRIVERS_LED_B1414_H_
|
||||
#define ZEPHYR_SAMPLES_DRIVERS_LED_B1414_H_
|
||||
|
||||
/*
|
||||
* At 6 MHz: 1 bit in 166.666 ns
|
||||
* 1200 ns -> 7.2 bits
|
||||
* 300 ns -> 1.8 bits
|
||||
* 900 ns -> 5.4 bits
|
||||
*/
|
||||
#define SPI_FREQ 6000000
|
||||
#define ZERO_FRAME 0x60
|
||||
#define ONE_FRAME 0x7C
|
||||
|
||||
#endif
|
||||
Loading…
Reference in a new issue