diff --git a/soc/arm/atmel_sam/same70/Kconfig.defconfig.series b/soc/arm/atmel_sam/same70/Kconfig.defconfig.series index 371e0b6458..a9a3e7888e 100644 --- a/soc/arm/atmel_sam/same70/Kconfig.defconfig.series +++ b/soc/arm/atmel_sam/same70/Kconfig.defconfig.series @@ -43,4 +43,9 @@ config DMA_SAM_XDMAC default y endif # DMA +if SPI +config SPI_SAM + def_bool y +endif # SPI + endif # SOC_SERIES_SAME70 diff --git a/soc/arm/atmel_sam/same70/dts_fixup.h b/soc/arm/atmel_sam/same70/dts_fixup.h index 0e2a449cdf..1908023ca4 100644 --- a/soc/arm/atmel_sam/same70/dts_fixup.h +++ b/soc/arm/atmel_sam/same70/dts_fixup.h @@ -55,6 +55,18 @@ #define CONFIG_I2C_2_IRQ_PRI ATMEL_SAM_I2C_TWIHS_40060000_IRQ_0_PRIORITY #define CONFIG_I2C_2_PERIPHERAL_ID ATMEL_SAM_I2C_TWIHS_40060000_PERIPHERAL_ID +#define CONFIG_SPI_0_BASE_ADDRESS ATMEL_SAM_SPI_40008000_BASE_ADDRESS +#define CONFIG_SPI_0_NAME ATMEL_SAM_SPI_40008000_LABEL +#define CONFIG_SPI_0_IRQ ATMEL_SAM_SPI_40008000_IRQ_0 +#define CONFIG_SPI_0_IRQ_PRI ATMEL_SAM_SPI_40008000_IRQ_0_PRIORITY +#define CONFIG_SPI_0_PERIPHERAL_ID ATMEL_SAM_SPI_40008000_PERIPHERAL_ID + +#define CONFIG_SPI_1_BASE_ADDRESS ATMEL_SAM_SPI_40058000_BASE_ADDRESS +#define CONFIG_SPI_1_NAME ATMEL_SAM_SPI_40058000_LABEL +#define CONFIG_SPI_1_IRQ ATMEL_SAM_SPI_40058000_IRQ_0 +#define CONFIG_SPI_1_IRQ_PRI ATMEL_SAM_SPI_40058000_IRQ_0_PRIORITY +#define CONFIG_SPI_1_PERIPHERAL_ID ATMEL_SAM_SPI_40058000_PERIPHERAL_ID + #define CONFIG_UART_SAM_PORT_0_NAME ATMEL_SAM_UART_400E0800_LABEL #define CONFIG_UART_SAM_PORT_0_BAUD_RATE ATMEL_SAM_UART_400E0800_CURRENT_SPEED #define CONFIG_UART_SAM_PORT_0_IRQ ATMEL_SAM_UART_400E0800_IRQ_0 diff --git a/soc/arm/atmel_sam/same70/soc_pinmap.h b/soc/arm/atmel_sam/same70/soc_pinmap.h index fe880c312a..90e3403a1e 100644 --- a/soc/arm/atmel_sam/same70/soc_pinmap.h +++ b/soc/arm/atmel_sam/same70/soc_pinmap.h @@ -135,4 +135,14 @@ #define PINS_TWIHS2 {PIN_TWIHS2_TWCK, PIN_TWIHS2_TWD} +/* Serial Peripheral Interface (SPI) */ + +#define PINS_SPI0_MASK \ + (PIO_PD20B_SPI0_MISO | PIO_PD21B_SPI0_MOSI | PIO_PD22B_SPI0_SPCK) +#define PINS_SPI0 {PINS_SPI0_MASK, PIOD, ID_PIOD, SOC_GPIO_FUNC_B} + +#define PINS_SPI1_MASK \ + (PIO_PC26C_SPI1_MISO | PIO_PC27C_SPI1_MOSI | PIO_PC24C_SPI1_SPCK) +#define PINS_SPI1 {PINS_SPI1_MASK, PIOC, ID_PIOC, SOC_GPIO_FUNC_C} + #endif /* _ATMEL_SAM_SOC_PINMAP_H_ */