drivers: adc: stm32: use correct macros for dma transfer
Use the correct dedicated macros for enabling DMA transfer for STM32H7 and U5. Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
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@ -221,12 +221,9 @@ static void adc_stm32_enable_dma_support(ADC_TypeDef *adc)
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#if defined(ADC_VER_V5_V90)
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if (adc == ADC3) {
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LL_ADC_REG_SetDMATransferMode(adc,
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ADC3_CFGR_DMACONTREQ(LL_ADC_REG_DMA_TRANSFER_LIMITED));
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LL_ADC_EnableDMAReq(adc);
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LL_ADC_REG_SetDMATransferMode(adc, LL_ADC3_REG_DMA_TRANSFER_LIMITED);
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} else {
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LL_ADC_REG_SetDataTransferMode(adc,
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ADC_CFGR_DMACONTREQ(LL_ADC_REG_DMA_TRANSFER_LIMITED));
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LL_ADC_REG_SetDataTransferMode(adc, LL_ADC_REG_DMA_TRANSFER_LIMITED);
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}
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#elif defined(ADC_VER_V5_X)
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LL_ADC_REG_SetDataTransferMode(adc, LL_ADC_REG_DMA_TRANSFER_LIMITED);
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@ -238,7 +235,15 @@ static void adc_stm32_enable_dma_support(ADC_TypeDef *adc)
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#error "The STM32F1 ADC + DMA is not yet supported"
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#else /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_adc) */
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#elif defined(CONFIG_SOC_SERIES_STM32U5X) /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_adc) */
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if (adc == ADC4) {
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LL_ADC_REG_SetDMATransfer(adc, LL_ADC_REG_DMA_TRANSFER_LIMITED_ADC4);
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} else {
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LL_ADC_REG_SetDataTransferMode(adc, LL_ADC_REG_DMA_TRANSFER_LIMITED);
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}
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#else /* defined(CONFIG_SOC_SERIES_STM32U5X) */
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/* Default mechanism for other MCUs */
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LL_ADC_REG_SetDMATransfer(adc, LL_ADC_REG_DMA_TRANSFER_LIMITED);
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