diff --git a/boards/arm/arduino_giga_r1/board.cmake b/boards/arm/arduino_giga_r1/board.cmake
index 74efbc1241..849f9f933f 100644
--- a/boards/arm/arduino_giga_r1/board.cmake
+++ b/boards/arm/arduino_giga_r1/board.cmake
@@ -2,8 +2,12 @@
 
 if(CONFIG_BOARD_ARDUINO_GIGA_R1_M7)
 board_runner_args(jlink "--device=STM32H747XI_M7" "--speed=4000")
+board_runner_args(openocd "--config=${BOARD_DIR}/support/openocd_arduino_giga_r1_m7.cfg")
+board_runner_args(openocd --target-handle=_CHIPNAME.cpu0)
 elseif(CONFIG_BOARD_ARDUINO_GIGA_R1_M4)
 board_runner_args(jlink "--device=STM32H747XI_M4" "--speed=4000")
+board_runner_args(openocd "--config=${BOARD_DIR}/support/openocd_arduino_giga_r1_m4.cfg")
+board_runner_args(openocd --target-handle=_CHIPNAME.cpu1)
 endif()
 board_runner_args(dfu-util "--pid=2341:0366" "--alt=0" "--dfuse")
 board_runner_args(blackmagicprobe "--connect-rst")
@@ -11,3 +15,4 @@ board_runner_args(blackmagicprobe "--connect-rst")
 include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake)
 include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
 include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
diff --git a/boards/arm/arduino_giga_r1/support/openocd_arduino_giga_r1_m4.cfg b/boards/arm/arduino_giga_r1/support/openocd_arduino_giga_r1_m4.cfg
new file mode 100644
index 0000000000..ddceef92cb
--- /dev/null
+++ b/boards/arm/arduino_giga_r1/support/openocd_arduino_giga_r1_m4.cfg
@@ -0,0 +1,12 @@
+
+source [find interface/stlink.cfg]
+
+transport select hla_swd
+
+set DUAL_BANK 1
+
+set DUAL_CORE 1
+
+source [find target/stm32h7x.cfg]
+
+reset_config srst_only srst_nogate connect_assert_srst
diff --git a/boards/arm/arduino_giga_r1/support/openocd_arduino_giga_r1_m7.cfg b/boards/arm/arduino_giga_r1/support/openocd_arduino_giga_r1_m7.cfg
new file mode 100644
index 0000000000..75d441d180
--- /dev/null
+++ b/boards/arm/arduino_giga_r1/support/openocd_arduino_giga_r1_m7.cfg
@@ -0,0 +1,28 @@
+
+source [find interface/stlink.cfg]
+
+transport select hla_swd
+
+source [find target/stm32h7x.cfg]
+
+# Use connect_assert_srst here to be able to program
+# even when core is in sleep mode
+reset_config srst_only srst_nogate connect_assert_srst
+
+$_CHIPNAME.cpu0 configure -event gdb-attach {
+        echo "Debugger attaching: halting execution"
+        gdb_breakpoint_override hard
+}
+
+$_CHIPNAME.cpu0 configure -event gdb-detach {
+        echo "Debugger detaching: resuming execution"
+        resume
+}
+
+# Due to the use of connect_assert_srst, running gdb requires
+# to reset halt just after openocd init.
+rename init old_init
+proc init {} {
+        old_init
+        reset halt
+}